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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

Save Your Time and Effort in Optimizing a Differential Pair Via Transition

Technology has become an essential part of our lives and is transforming our world…

• 5 min read
Clarity 3D Layout , Optimality intelligent explorer , Clarity 3D Solver

Corporate News

GUC Tapes Out Complex 3D Stacked Die Design on Advanced FinFET Node Using Cadence…

Global Unichip Corporation (GUC), a leading global ASIC provider, has successfully…

• 2 min read
3D-IC , Innovus Implementation

Computational Fluid Dynamics

What Makes Fidelity the Preferred Choice for Large Eddy Simulation (LES)?

LES is now more accessible and affordable, thanks to modern numerics and GPU acceleration…

• 7 min read
CFD , featured , large eddy simulation , GPU acceleration , Cascade Technologies , simulation software , Mesh Generation

Digital Design

Let's Discover the Secret to Enhance Design's PPAC in a Single Cockpit!

Traditionally, you would do power, performance, area, and congestion (PPAC) analysis…

• 3 min read
performance , debug , training , congestion , PPAC , training bytes , area , power , Joules RTL Design Studio

中文技术专区

大模型应用：激发芯片设计新纪元

生成式AI如同当红炸子鸡，吸引着全球的目光。当前，围绕这一领域的竞争愈发白热化，全球陷入百模大战，并朝着千模大战奋进。在这场潮流中，AI芯片成为支撑引擎，为大模型应用提供强有力的支持…

• less than a min read
大模型应用 , chiplet , 仿真工具 , xcelium , AI , verification

Corporate News

WPI Is Enabling Non-Invasive Patient Monitoring

According to Worcester Polytechnic Institute (WPI), the future of medicine is the…

• 1 min read
Virtuoso Studio , biomedical , designed with cadence , PSPICE , Spectre , PVS

The India Circuit

Karuna Narayan Kadam: An Exemplar of How Resilience Can Conquer Adversity

Karuna's story began in the narrow streets of Pune, where her father, a hardworking…

• 2 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

System, PCB, & Package Design 

The Year That Was: Cadence PCB and Package Design Blogs in 2023

Happy New Year! As we welcome 2024, we would like to take a moment to express our…

• 2 min read
Cadence Design Systems , IC Packaging , BoardSurfers , Cadence Doc Assistant , CDA , Cadence Help , PCB design , Training Insights , Allegro PCB Editor , ASCENT , SKILL , Allegro

Analog/Custom Design

The 6 Requirements of Effective Analog Layout Automation

Analog Layout remains a time consuming manual task to most layout designers. For…

• 3 min read
analog prototyping , analog , Custom IC

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: Virtuoso 3D Viewerを使用したEMX電流密度の解析

'Virtuoso Meets Maxwell'はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• 1 min read
Cadence blogs , Virtuoso Custom IC Design , Virtuoso Meets Maxwell , Virtuoso RF Solution , Layout EXL , Electromagnetic analysis , Layout , japanese blog , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , Custom IC

Corporate News

proteanTecs Is Helping Electronics Monitor their Health

For technologies like autonomous vehicles, data centers, and mobile communications…

• 1 min read
Automotive , ml , Virtuoso Studio , Tempus , infotainment , designed with cadence , machine learning , digital flow , Genus Synthesis Solution , ADAS , Innovus Implementation

Verification

What Is Viral in CXL 3.0?

Introduction to CXL 3.0 CXL 3.0 is an open-standard interconnect technology that…

• 3 min read
CXL , Verification IP , viral , Functional Verification

System, PCB, & Package Design 

Revolutionizing Automotive Design with Chiplet-Based Architecture

The global chip market has seen a significant increase in demand for high-performance…

• 4 min read
Automotive , chiplets , chiplet , chiplet-based systems

Digital Design

Voltus Voice: Navigating 2023 - A Recap of our Blogging Odyssey

A recap of the power integrity posts in the Voltus Voice blog series through 2023…

• 6 min read
Early Rail Analysis , Silicon Signoff and Verification , Voltus IC Power Integrity Solution , 3D-IC , RTL-to-GDSII , Thermal Analysis , Power Analysis , vector profiling , Multi-Chiplet Design

Digital Design

Voltus Voice: Multi-Chiplet Marvels – Exploring Chip-Centric Thermal Analysis

Dive into the intricate world of chip-centric thermal analysis to understand its…

• 4 min read
Celsius Thermal Solver , Silicon Signoff and Verification , Voltus IC Power Integrity Solution , Integrity 3D-IC Platform , EM-IR , Thermal Analysis , 3D-IC Technology , system planning , Multi-Chiplet Design

Academic Network

Cadence Academic Network - A Year in Review

Each year that passes, we are delighted by the growth of our community! We’re excited…

• 4 min read
Cadence Academic Network , academia , cadencelive , Design Automation Conference , Young People Programme

Digital Design

Cadence Doc Assistant: Elevate Your Knowledge With Our Next-Gen Help System

The SSV 23.1 release comes with a brand-new content delivery application called Cadence…

• 3 min read
documentation , Silicon Signoff and Verification , Search , SSV , Cadence Doc Assistant , help , Cadence Help , 23.1

Digital Design

SSV 23.1 Base Release Now Available

The Silicon Signoff and Verification (SSV) 23.1 release is now available for download

• 4 min read
Celsius Thermal Solver , Silicon Signoff and Verification , Die-Model Grid Reduction , Voltus IC Power Integrity Solution , Silicon Prediction , hyperscale , SSV23.10 , Thermal Analysis , Power Analysis , Tempus Timing Signoff Solution , Skew Robustness , Doc Assistant

Digital Design

Training Insights – Implement Your Digital Circuits Using Virtuoso Digital Implementation…

Are you excited to know more about the Virtuoso Digital Implementation flow, which…

• 3 min read
Innovus Implementation System , Virtuoso Digital Implementation , training bytes , Digital Implementation , Genus Synthesis Solution , Mixed Signal Designers , Analog on top designs
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