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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

How Your PCB Design Team Can Become Your Dream Team for Power Integrity

Cadence’s Sigrity team speaks to a lot of power integrity tool users. Experts in…

• 3 min read
PCB , PI , PDN , Power Integrity , Layout , Sigrity , simulation , Schematic

Breakfast Bytes

RISC-V Shanghai 二

This is my second (二 in Chinese) post about the 6th RISC-V workshop held in early…

• 8 min read
computer architecture , risc-v , isa , instruction set architectures , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Convolutional Neural Network Challenges: Bandwidth Requi…

In this week's Whiteboard Wednesdays video, Megha Daga takes a deep dive into bandwidth…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks , bandwidth

Breakfast Bytes

Fifty Years of Computer Architecture: The Last 30 Years

As part of the RISC-V workshop, Dave Patterson gave a talk on computer architecture…

• 6 min read
risc-v , CISC , AMD , titanium , vliw , RISC , Breakfast Bytes

Breakfast Bytes

Fifty Years of Computer Architecture: The First 20 Years

As part of the RISC-V workshop, Dave Patterson gave a talk on computer architecture…

• 6 min read
Intel , risc-v , CISC , RISC , ibm 360 , Breakfast Bytes , dave patterson

Breakfast Bytes

Dream Chip: A Vision for Your Car

Dream Chip is a company based in Germany just outside Hannover. Martin Zeller presented…

• 4 min read
Automotive , dreamchip , 22fdx , ADAS , GlobalFoundries , Breakfast Bytes , FD-SOI

Analog/Custom Design

Virtuosity: Is it Possible to Create a Bus on Several Metal Layers Simultaneously…

Routing Multiple Nets on Different Metal Layers to Gain Productivity Have you…

• 7 min read
transitioning capabilities , space-based router , weAddCustomTransitionMenuItem , customizing multi-layer bus , weRemoveCustomTransitionMenuItem , custom layer pattern , switching bus bits , weGetCustomTransitionMenuItems , multi-layer bus , stacked wires , Layout , Virtuosity , revert to multi-layer bus

Breakfast Bytes

CDNLive EMEA Zwei

This is the second post about CDNLive EMEA in Munich. Here is the first . If the…

• 9 min read
CDNLive , virtual platform , CDNLive EMEA , Bosch , CDNLive Munich , OrCAD , ARM , arrow , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview May 22nd to 26th 2017

https://youtu.be/Frsw0YkUF5M Coming from Marienplatz, Munich, Germany (camera…

• less than a min read
open source silicon , computer architecture , risc-v , Heart of Technology , Denali Party , isa , Denali , open source , instruction set architecture

Whiteboard Wednesdays

Whiteboard Wednesdays – Tensilica Fusion G6 DSP Takes on Automotive ADAS Radar A…

In this week's Whiteboard Wednesdays video, Pushkar Patwardhan gives an overview…

• less than a min read
DSP , Whiteboard Wednesdays , fusion G6 , Fusion G3 , radar , Tensilica , Fusion DSP Family

Breakfast Bytes

CDNLive EMEA Eins

Every CDNLive has a little bit of a different structure. At CDNLive EMEA in Munich…

• 7 min read
High-Level Synthesis , Automotive , Tom Beckley , CDNLive , CDNLive EMEA , iN7 , JasperGold , HLS , Breakfast Bytes

RF Engineering

7 Habits of Highly Successful S-Parameters: How to Simulate Those Pesky S-Parameters…

Hello Spectre Users, Simulating S-parameters in a time domain (transient, periodic…

• less than a min read
S-parameter , Spectre RF , Spectre , International Microwave Symposium

Breakfast Bytes

JasperGold: Stepping up to RTL Signoff

When I was on my last tour of duty at Cadence in the early 2000s, we had a late afternoon…

• 7 min read
Intel , Jasper , JasperGold , Formal verification

Breakfast Bytes

The New Tensilica Fusion G6 DSP

Only last week, in Are General-Purpose Microprocessors Over? I wrote about how general…

• 4 min read
fusion G6 , Tensilica , Breakfast Bytes , digital signal processor

Computational Fluid Dynamics

Fluid Dynamics Simulation of a Generic Gas Turbine Combustor

This case study on combustion and radiative heat transfer in a generic gas turbine…

• less than a min read

Breakfast Bytes

FD-SOI State of the Union: There's Supply—Is There Demand?

I went to the annual SOI Silicon Valley Symposium recently. As last year, they had…

• 11 min read
dreamchip , China , NXP , 22fdx , 12fdx , Samsung , handel jones , GlobalFoundries , ARM , ibs , Breakfast Bytes , FD-SOI

Analog/Custom Design

Virtuosity: What's New in analogLib

It's been a while since analogLib was updated, so we decided to pay some attention…

• 4 min read
Analog Design Environment , ADE Explorer , Analog Simulation , analog , ADE , Virtuoso , Analog Design Environment , Schematic Editor , Virtuosity , Custom IC Design , Schematic , ADE Assembler

Breakfast Bytes

RISC-V 6th Workshop 上海

The 6th RISC-V workshop was held in early May. It was the first one in Asia, at Shanghai…

• 11 min read
computer architecture , risc-v , risc-v foundation , dave patterson

Breakfast Bytes

What's For Breakfast? Video Preview May 15th to 19th 2017

https://youtu.be/WTQhUyl2BBE Coming from Jing'an Park, Shanghai, China (camera…

• less than a min read
Automotive , dreamchip , CDNLive , CDNLive Munich , Tensilica , software development
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