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Featured

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
Corporate 22 Jun 2026 • 8 min read
featured , physical ai , HGR , AI , Honda

Corporate News

The New ASK Portal Brings a Smarter, Faster, and More Intuitive Experience

Finding the right support content should be simple, fast, and intuitive. The new…

Corporate
Corporate 22 Jun 2026 • 2 min read
featured , customer support , New ASK Portal , ASK Gen AI

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
Corporate 18 Jun 2026 • 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai
cdns - all_blogs_categories

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  • System, PCB, & Package Design  1015
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Blog - Post List
Latest blogs

Analog/Custom Design

Virtuosity: Blogging Journey of Virtuoso Place and Route in 2019

To support various new features and enhancements in Virtuoso Placement and Routing…

Parula 7 Feb 2020 • 6 min read
tree routing , Modgen On Canvas , structured routing , ICADVM18.1 , Virtuoso Space-based Router , EXL , mesh routing , MODGEN , Automated Device-Level Placement and Routing , Virtuoso Placer , Layout EXL , trunk-to-trunk mesh , Auto P&R , Mixed-Signal , Tree Route , Layout Suite , trunk creation , Generate Trunk , Finish Trunk , EM Trunk Optimization , Custom IC Design , Virtuoso Layout Suite , Custom IC

Breakfast Bytes

How Is the C Compiler Written in C?

Often compilers for computer programming languages are written in their own language…

Paul McLellan 7 Feb 2020 • 7 min read
llvm , compiler , C++

Computational Fluid Dynamics

Boom Supersonic: Relaunching Commercial Supersonic Aircraft Travel

Authors: Michael Rybalko, Aeropropulsion Engineer, Boom Supersonic & Jean-Charles…

AnneMarie CFD 6 Feb 2020 • 5 min read
CFD , NUMECA

Breakfast Bytes

Exadata: An Epic Journey at Oracle with Persistent Memory

A couple of weeks ago was the Persistent Memory Summit 2020. See my post Persistent…

Paul McLellan 6 Feb 2020 • 5 min read
persistent memory summit , exadata , Oracle , optane , persistent memory

Verification

A Specman/e Syntax for Sublime Text 3

We're happy to have guest blogger Thorsten Dworzak, Principal Consultant at Verilab…

teamspecman 5 Feb 2020 • 1 min read
Specman , Specman/e , Specman e , Sublime Text , specman elite

Breakfast Bytes

The Signal Integrity Story

Yesterday, I started to talk about how new technologies find their way over time…

Paul McLellan 5 Feb 2020 • 5 min read
celsius , CadMOS , Signal Integrity , Sigrity , clarity

System, PCB, & Package Design 

IC Packagers: A Boundless Bounty of Bounding Shapes

How’s that for a tongue twister? Go ahead, try and say it three times fast! What…

Tyler 4 Feb 2020 • 4 min read
Allegro Package Designer

System, PCB, & Package Design 

BoardSurfers: High-Speed Design Signal Integrity Challenges and Solutions

Usually, people start a blog by stating something dramatic and we used to bring drama…

mrigashira 4 Feb 2020 • 3 min read
Sigrity , Allegro PCB Editor

Breakfast Bytes

How Technologies Get into EDA

When I was last at Cadence around 2000, I ran what was then Custom IC. It was a different…

Paul McLellan 4 Feb 2020 • 6 min read
sales , startups , ambit , Signal Integrity , salesforce

Breakfast Bytes

Persistent Memory at Twitter

A couple of weeks ago was the Persistent Memory Summit 2020. See my post Persistent…

Paul McLellan 3 Feb 2020 • 3 min read
persistent memory summit , Oracle , optane , Twitter , persistent memory

Verification

USB3, PCIe, DisplayPort Protocol Traffic Finding its Way Through USB4 Routers

USB4 can simultaneously tunnel USB3, PCIe and DisplayPort native protocol traffic…

Neelabh 1 Feb 2020 • 1 min read
Verification IP , DP , DisplayPort , USB , usb4 , PCIe , tunneling

Breakfast Bytes

Persistent Memory: We Have Cleared the Tower

Last week it was the Persistent Memory Summit 2020, which has been running annually…

Paul McLellan 31 Jan 2020 • 7 min read
persistent memory summit , persistent memory , 3dxpoint

Breakfast Bytes

Quarry Bank Mill: A Technology Museum from the Industrial Revolution

A couple of years ago (and from time to time since) I wrote a series of blog posts…

Paul McLellan 30 Jan 2020 • 5 min read
industrial revolution , museum

Breakfast Bytes

Sigrity Aurora: In-Design Analysis

Cadence's new Sigrity Aurora puts all the power of the Sigrity engines under the…

Paul McLellan 29 Jan 2020 • 3 min read
Sigrity Aurora , Signal Integrity , Sigrity

Life at Cadence

Intelligent System Design

Electronics technology is proliferating to new, creative applications and appearing…

Corporate 28 Jan 2020 • 9 min read
intelligent system design

System, PCB, & Package Design 

IC Packagers: Mysteries Revealed - Why Is Flip-Chip Chip-Down the Default Library…

We’ve come to the end of my New Year’s Resolutions for 2020. Before we dive deeper…

Tyler 28 Jan 2020 • 4 min read
Allegro Package Designer

Breakfast Bytes

IEDM: Novel Interconnect Techniques Beyond 3nm

During the short course on the Sunday before IEDM, Chris Wilson of imec presented…

Paul McLellan 28 Jan 2020 • 4 min read
interconnect , imec , IEDM

Breakfast Bytes

RIP Clayton Christensen

Clayton Christensen died last Thursday, at the relatively young age of 67. He was…

Paul McLellan 27 Jan 2020 • 6 min read
clayton christensen , innovator's dilemma

Analog/Custom Design

Virtuosity: Reminiscing About The Last 'Teen' Year of Custom IC Design Blogs

If you have missed reading any of our Virtuosity, Virtuoso Meets Maxwell, Virtuoso…

Dishika Majumdar 24 Jan 2020 • 3 min read
ICADVM18.1 , Automated Device-Level Placement and Routing , Virtuoso RF , Layout EXL , Electromagnetic analysis , Virtuoso , Virtuosity , Custom IC Design , Virtuoso Layout Suite , Custom IC
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