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The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

IC Packagers: How Far Away are You?

Layout design is all about clearances. Daily challenges come from maintaining consistent…

• 3 min read
SiP Layout

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Electrical Constraints

Whether it's NASA's space missions or a school camping trip; building a cutting-edge…

• 3 min read
Constraint Manager , Allegro Package Designer , Allegro PCB Editor , SiP Layout

Analog/Custom Design

Virtuoso IC6.1.8 ISR6 and ICADVM18.1 ISR6 Now Available

The IC6.1.8 ISR6 and ICADVM18.1 ISR6 production releases are now available for download…

• 2 min read
Analog Design Environment , Cadence blogs , ICADVM18.1 , ADE Explorer , Virtuoso Space-based Router , Automated Device-Level Placement and Routing , Automatic Placement , Interactive and Assisted Routing , IC Release Announcement blog , Virtuoso RF , Layout EXL , ADE , Mixed-Signal , Layout , Virtuoso , advanced nodes , New in EDA , Virtuoso EM Solver , Custom IC Design , Virtuoso Layout Suite , Custom IC , ADE Verifier , IC6.1.8 , ADE Assembler

Breakfast Bytes

CDNLive India 2019: NXP and More

Last week I covered Day 1 of CDNLive India . Today it is the turn of verification…

• 6 min read
NXP , CDNLive India , CDNLive

Analog/Custom Design

Virtuoso Meets Maxwell: Add Some MAGic to Your ElectroMAGnetic Analysis

If you’ve ever seen a great magician at work, you know that their talent lies in…

• 4 min read
ICADVM18.1 , Virtuoso New Design Platform , video , Virtuoso Meets Maxwell , Virtuoso RF , Electromagnetic analysis , EM Analyis , RF design , Custom IC Design , Virtuoso Layout Suite

Breakfast Bytes

HOT CHIPS: In-DRAM Compute

Something that has been discussed for years is the fact that we could add processors…

• 4 min read
pim , hot chips , processor in memory

Verification

Dimensions to Verifying a USB4 Design

Verification of a USB4 router design is not just about USB4 but also about the inclusion…

• 2 min read
Verification IP , Router , DisplayPort , USB , usb4 , PCIe , USB3 , tunneling

Breakfast Bytes

Sunday Brunch Video for 8th September 2019

https://youtu.be/AvimlRMDZng Made at Cadence parking lot (camera Steve Brown) Monday…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Ken的博客系列之五 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：启用约束驱动设计 高效的互连提取 一旦物理layout完成（或者至少串行链路差分对的布线完成），就可以进行布局后验证。需要决定使用多大的带宽进行模型提取…

• less than a min read
SI , Chinese blog , ddr5 , 仿真分析 , DDR4 , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性 , SI分析与建模

Breakfast Bytes

Pervasive Intelligence

The biggest change in technology over the last five or ten years is the sudden kicking…

• 2 min read
pervasive intelligence , design excellence , intelligent system design

Breakfast Bytes

CDNLive India 2019: Mediatek and More

If you live in California, as I do, then India is a long way away. It is 11½ hours…

• 5 min read
CDNLive India , CDNLive , mediatek

Analog/Custom Design

Virtuosity: Support for Stacked Devices in Modgen

This blog provides an overview of the support for stacked devices in Modgen. This…

• 3 min read
Modgen On Canvas , MODGEN , Module Generator , stacked devices , modgen stacks , Virtuoso , Virtuosity , Custom IC Design , modgens , Virtuoso Layout Suite , Virtuoso Layout Suite GXL

Academic Network

Cadence and the Academic Network Support Design Contests in the Asia Pacific

Design contests are a unique way for students to get hands-on experience using Cadence…

• 2 min read
university , academia , Academic Network , university program

Breakfast Bytes

Ten Reasons to Attend CDNLive Israel

CDNLive Israel is coming up later this month on September 18 at the David Intercontinental…

• 3 min read
CDNLive , cdnlive israel

Breakfast Bytes

Conformal Litmus

One of the earliest science experiments I can remember doing was crushing red cabbage…

• 2 min read
conformal , litmus , Equivalence Checking

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Component Placement - Get Set and Go!

How do you place components on a PCB design? Manually? Or quickly using automation…

• 4 min read
PCB Editor

System, PCB, & Package Design 

IC Packagers: Manufacturing Cross-Hatched Shapes

If you use cross-hatched shapes in your package design, you are doubtless aware of…

• 3 min read
SiP Layout

Breakfast Bytes

HOT CHIPS: The Tesla Full Self-Driving Computer

On April 22, Tesla held its Autonomy Day. They announced their "Self-Driving Computer…

• 4 min read
Automotive , hotchips , tesla

Analog/Custom Design

Virtuosity: Device-Level Routing for Advanced Nodes – Trunk-to-Trunk Mesh Routin…

This blog highlights the importance of trunk-to-trunk mesh routing feature for providing…

• 3 min read
trunk mesh routing , Trunk generation , Interactive Routing , Pin to Trunk , structured routing , ICADVM18.1 , Virtuoso Space-based Router , mesh routing , Layout EXL , trunk-to-trunk mesh , Layout Suite , trunk creation , Generate Trunk , mixed signal , Finish Trunk , EM Trunk Optimization , Custom IC Design , Virtuoso Layout Suite , Custom IC
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