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Featured

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
MBhatnagar 22 Sep 2025 • 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
Corporate 20 Sep 2025 • 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC

Corporate News

Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

Corporate
Corporate 17 Sep 2025 • 6 min read
Automotive , featured , physical ai , automotive electronics , AI

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
Reela Samuel 2 Sep 2025 • 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI
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Blog - Post List

Latest blogs

System, PCB, & Package Design 

What's Good About the Latest in ADW? The 16.6-2015 Release Has Several New Enhancements…

With the Allegro Design Workbench (ADW) 16.6-2015 release, you’ll have several new…

Jerry GenPart 25 May 2016 • 2 min read
PCB , Cadence Design Systems , Allegro Design Workbench , Library and design data management , Grzenia , Librarians , library , ADW

Breakfast Bytes

Andrew Kahng on Industry-Academia Cooperation

At CDNLive Silicon Valley, Professor Andrew Kahng of UCSD gave a presentation titled…

Paul McLellan 25 May 2016 • 4 min read
ucsd , Cadence Academic Network , CDNLive , academia , kahng , CDNLive Silicon Valley

SoC and IP

Continued Strength of the Design&Reuse IP-SoC India

Design&Reuse events are always exciting for their draw of an IP-centric audience…

Steve Brown 25 May 2016 • 1 min read
PCIe Gen4 , 10G-KR , SerDes

Verification

Simulation Acceleration—Maximizing Simulator Performance

"Simulation Acceleration” or “Accelerated Verification” are terms commonly used to…

teamspecman 25 May 2016 • 4 min read
Specman , Functional Verification , e , specman elite , verification

Whiteboard Wednesdays

Whiteboard Wednesdays—Creating an Acceleration-Ready Simulation Environment with…

In this week's Whiteboard Wednesdays video, Ofer Steinberg explains how accelerated…

References4U 24 May 2016 • less than a min read
accelerated VIP , Verification IP , Whiteboard Wednesdays , IP , VIP , Palladium XP , simulation , SystemVerilog UVM , verification

Breakfast Bytes

CDNLive: Routing at 10nm

At CDNLive Silicon Valley, Geeta Garg and Chad Hale of ARM, and Ming Yue of Cadence…

Paul McLellan 24 May 2016 • 3 min read
CDNLive , Routing , implementation , 10nm

Breakfast Bytes

What Is RocketSim? Why Did Cadence Acquire Rocketick?

I talked to Uri Tal last week, who has just joined Cadence as a result of the Rocketick…

Paul McLellan 23 May 2016 • 3 min read
dac2016 , gate-level simulation , DAC , Functional Verification , NVIDIA , RTL simulation , Incisive , dft simulation , rocketick , rocketsim , intel capital , Breakfast Bytes

Breakfast Bytes

Linley IoT Conference: Security and...Well, Just Security

Mike Demler gave the keynote at the Linley IoT conference a couple of weeks ago.…

Paul McLellan 20 May 2016 • 5 min read
security , IoT , industrial , Linley , wearables , Internet of Things , power , consumer , Breakfast Bytes

Breakfast Bytes

It's HOT in Austin in June

Every DAC, Heart of Technology (HOT) organizes an event. This year it will be held…

Paul McLellan 19 May 2016 • 2 min read
dac2016 , DAC , CASEA , HOT , Heart of Technology , Jim Hogan , Breakfast Bytes

Breakfast Bytes

Party Like It's 1999—How the Denali Party Started

As everyone in EDA knows, Denali threw a party at every DAC for what seems like forever…

Paul McLellan 18 May 2016 • 3 min read
dac2016 , DAC , Denali Party , disco inferno , Denali , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays—Modular VIP Architecture

In this week's Whiteboard Wednesdays video, Liron Stoler describes how the Cadence…

References4U 17 May 2016 • less than a min read
Verification IP , Whiteboard Wednesdays , IP , VIP , system-level verification , block-level verification , modular architecture

Breakfast Bytes

CDNLive EMEA: Memories Are Made of This

At CDNLive in Munich, Amjad Qureshi talked about High-Speed DDR and LPDDR Memory…

Paul McLellan 17 May 2016 • 4 min read
LPDDR , CDNLive EMEA , memory IP , DDR , memory interface IP

RF Engineering

Cadence Presenting Four Spectre RF MicroApp Papers at IMS2016, May 22-27

Hello Spectre RF Users, Next week is my all time favorite technical conference -…

Tawna 16 May 2016 • less than a min read
RF , RF Simulation , wireless , analog/RF , HBnoise , Circuit simulation , Wilsey , HB , Spectre RF , pnoise , phase noise , Schaldenbrand , spectreRF , RF design , harmonic balance , pss

Breakfast Bytes

EDPS Cyber Security Workshop: "Anything Beats Attacking the Crypto Directly"

Many of the security breaches that you read about are the results of software failures…

Paul McLellan 16 May 2016 • 5 min read
security , fault injection , side channel attack , Monterey , differential power analysis , EDPS , riscure , cyber security , Breakfast Bytes

Breakfast Bytes

Can You Trust Your IoT Supplier?

A few weeks ago, Nest announced that it was shutting down Revolv. You probably don…

Paul McLellan 13 May 2016 • 4 min read
alphabet , IoT , revolv , tesla , Internet of Things , nest , Breakfast Bytes

Breakfast Bytes

CDNLive EMEA: Do You Know What a FIT Is?

ADAS changes everything about automotive and requires a whole new range of skills…

Paul McLellan 12 May 2016 • 6 min read
functional safety , CDNLive EMEA , automotive design , FIT

Breakfast Bytes

Cadence at DAC: Experts, Presentations, Lunches...and Denali Party Instructions

Cadence is doing a lot at DAC as usual. Here is a summary. But read it carefully…

Paul McLellan 11 May 2016 • 4 min read
dac2016 , DAC , expert bar , Austin , Denali Party , dac53 , Lip-Bu Tan , Denali , 53dc , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays—Tensilica Vision P6 DSP Enhanced for CNN

In this week's Whiteboard Wednesdays video, Dennis Crespo discusses the significant…

References4U 10 May 2016 • less than a min read
DSP , Whiteboard Wednesdays , IP , Vision P6 , Tensilica , convolutional neural networks , CNN

Breakfast Bytes

Bayern München Come to CDNLive EMEA

CDNLive EMEA is nominally held in Munich (München in German) but, in fact, is held…

Paul McLellan 10 May 2016 • 5 min read
Munich , CDNLive , CDNLive EMEA , Breakfast Bytes , Bayern München
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