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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

Whiteboard Wednesdays

Tensilica HiFi 5 DSP Enabling Machines for Voice UI

In this week’s Whiteboard Wednesday, Sachin Ghanekar, Design Engineering Group director…

• less than a min read
hifi 5 , Whiteboard Wednesdays , Tensilica , HiFi DSP

Breakfast Bytes

Bagels and Brains: SEMI's Artificial Intelligence Breakfast

A couple of weeks ago the Silicon Valley chapter of SEMI held a breakfast meeting…

• 7 min read
Intel , semi , machine learning , aws , Amazon , xilinx , ARM , AI

定制IC芯片设计

Virtuoso: 新序曲-Design Planner 工具简介

新版的Virtuoso平台（*ICADVM18.1）提供了突破性的分析功能和创新的仿真驱动版图设计，实现了更强大，更高效的设计，支持最先进的工艺技术。基于该解决方案…

• less than a min read
Chinese blog , Cadence blogs , Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Advanced Release , Virtuoso , New in EDA , Custom IC Design , Design Planner , Custom IC , Layout Editing

Breakfast Bytes

Portable Stimulus and Correct Designs

The title of this post seems pretty generic, after all who wouldn't want correct…

• 4 min read
correct designs , Perspec , Accellera , pss

Breakfast Bytes

Sunday Brunch Video for 11th November 2018

https://youtu.be/deyk_MEkjZg Made at Cadence Diwali Celebration (camera Sean) Monday…

• less than a min read
Automotive , risc-v , China , Kaufman Award , IEDM

PCB、IC封装：设计与仿真分析

针对电气工程师的热管理基础——第一篇

作者：Lawrence Der 在过去，机械工程师全权负责产品的热力设计，包括产品的机械外壳和其它物理方面的设计；然而现在，热力设计问题却是要电气工程师来共同承担…

• less than a min read
热 , Chinese blog , 热分析 , 温度 , 中文 , PowerDC , 传热 , 热基础

Breakfast Bytes

Kaufman Award Dinner: The Tom Williams Story

Wednesday night it was the annual Kaufman Award Dinner to honor this year's recipient…

• 6 min read
kaufman dinner , scan , Scan test , IBM , Kaufman Award , tom williams , lssd , synopsys

Breakfast Bytes

RISC-V Summit Preview: Pascal or Linux?

Coming up in December, in the same week as IEDM, is the RISC-V Summit at the Santa…

• 3 min read
risc-v , Spectre , instruction set architecture

Breakfast Bytes

IEDM Preview: 3nm and More

A lot of aspects of EDA and semiconductor are fairly easy to predict: you read off…

• 5 min read
IBM , 3nm , Samsung , imec , gaa , tu dresden , IEEE , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays - How the Cadence 112G SerDes IP Solves the Challenges of Long…

In this week’s Whiteboard Wednesday, Wendy Wu explains what NRZ and PAM-4 signaling…

• less than a min read
Whiteboard Wednesdays , 100G Ethernet , 112G SerDes , PAM-4 , SerDes , 400G Ethernet , 800G Ethernet

Breakfast Bytes

Automotive Summit: Driving an Industry with Electronics

Coming up on November 14th is the Cadence Automotive Summit. This will be held on…

• 3 min read
Automotive , lidar , radar , Tensilica , vision , ISO 26262 , ADAS , ARM

The India Circuit

A Diwali with Green Crackers and Cooking Bots

It’s Diwali! My favorite festival out of all the many celebrations that we Indians…

• 3 min read
firecrackers , green cracker , air pollution , Diwali

Breakfast Bytes

Breakfast Buffet for October 2018

https://youtu.be/YBlBzB3n504 The three highlighted posts for October were: CDNLive…

• less than a min read
hifi 5 , breakfast buffet , 112G SerDes , cdnlive israel

Breakfast Bytes

China Update

Over the last couple of weeks, I came across various little things about China, none…

• 6 min read
China , Micron , semi , DRAM , ic insights , bloomberg

Breakfast Bytes

Sunday Brunch Video for 4th November 2018

https://youtu.be/HCJG-tABZWE Made at Linley Fall Processor Conference (camera Sean…

• less than a min read
Automotive , hifi 5 , curvycore , formal , openroad , Tensilica , photonics , Texas Instruments , JasperGold , darpa

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之10：易于使用的改进

我所认识的大多数PCB设计工程师跟我有同样的习惯… 我们有最喜欢的颜色、板层名称、定制的键盘，我们最大的目标是看到一天之内完成了多少条网络布线。我们很少有改变这些使用习惯…

• 1 min read
PCB , Chinese blog , Allegro 17.2 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , Allegro

Breakfast Bytes

ERI: OpenROAD

If I had to summarize DARPA's Electronic Resurgence Initiative in one phrase, it…

• 6 min read
openroad , kahng , open source , eri , darpa

Breakfast Bytes

Yoga is Passé, the Future Is CurvyCore

Despite CurvyCore sounding like something that you might take classes in at your…

• 5 min read
curvycore , conformal routing , Virtuoso , photonics

Breakfast Bytes

"Alexa, What Is HiFi 5?"

"Alexa, turn on the living room light." "Okay." "Alexa, what is Cadence announcing…

• 4 min read
hifi 5 , alexa , audio , voice recogntion , Tensilica
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