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Featured

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
Cadence Japan 15 Dec 2025 • less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP(Verification IP:VIP)を発表しました。今回発表されたVIPは…

Cadence Japan
Cadence Japan 4 Dec 2025 • less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
Cadence Japan 1 Dec 2025 • 2 min read
featured , japanese blog
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

New PCIe SI Challenges Conquered Using Clarity 3D Field Solver for PCB

Figure 1: High-performance PCIe-based graphics card There is a trend in the data…

Sigrity 12 May 2020 • 10 min read
Serial link analysis , SI , bit-error-rate , PCIe , Signal Integrity , serial link , SerDes , Channel simulation , Sigrity , Clarity 3D Solver , PCI-SIG , clarity

System, PCB, & Package Design 

IC Packagers: The Choice Between Static and Dynamic Shapes

That title might be a touch misleading. We’re not here to talk about why to convert…

Tyler 12 May 2020 • 5 min read
Allegro Package Designer , Allegro PCB Editor

Breakfast Bytes

Happy Birthday Florence Nightingale: Nurse, Statistician, Feminist

Today is the 200th anniversary of the birth of the first woman member of the Royal…

Paul McLellan 12 May 2020 • 7 min read
florence nightingale , statistics , women in science

System, PCB, & Package Design 

Challenges of On-Chip Thermal Analysis in Electronic System Designs

In the beginning of our universe, enormous amount of heat or energy was generated…

CTKao 11 May 2020 • 4 min read
Celsius Thermal Solver , IC Package , system analysis , EE Thermal , temperature , Power Integrity , 3D analysis , Voltus , Heat transfer , electrical-thermal co-simulation , thermal , heterogenous integration

Analog/Custom Design

Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part VI

This is the last blog in the miniseries that aims at providing in-depth details of…

Kabir 11 May 2020 • 4 min read
EM Analysis , AXIEM , ICADVM18.1 , awr , Virtuoso RF , Electromagnetic analysis , 3D EM simulation , AWR AXIEM , Custom IC Design , Virtuoso Layout Suite

Breakfast Bytes

Why Create an SoC?

I've been in the semiconductor and EDA industries for nearly forty years. One thing…

Paul McLellan 11 May 2020 • 10 min read
SoC , design , risk

Breakfast Bytes

Sunday Brunch Video for 10th May 2020

https://youtu.be/feK4sISKChA Made on Communication Hill, San Jose (camera Carey…

Paul McLellan 10 May 2020 • less than a min read
sunday brunch

System, PCB, & Package Design 

BoardSurfers: Training Insights: Placing Parts Manually Using Design for Assembly…

So, what if you can figure out all that can go wrong when your product is being assembled…

Shreyansh 8 May 2020 • 2 min read
Allegro PCB Editor

Breakfast Bytes

Hearables and Earbuds

Do you have a set of Bluetooth earbuds yet? If not, you will. The iPhone was the…

Paul McLellan 8 May 2020 • 5 min read
featured , HiFi , Tensilica , hearables , earbuds

Life at Cadence

Creative Ideas at Work Can Play a Big Part in Difficult Times

In the blink of an eye, we entered into a new, virtual reality, and the rapidly shifting…

Neil Zaman 7 May 2020 • 5 min read
Leaderhip

Breakfast Bytes

2G: Mobile Goes Digital

In last week's post, 1G Mobile: AMPS, TOPS, C-450, Radiocom 2000, and All Those Japanese…

Paul McLellan 7 May 2020 • 12 min read
5G , GSM , 2g , mobile

System, PCB, & Package Design 

IC Packagers: Advanced In-Design Symbol Editing

We have talked about aspects of the in-design symbol edit application mode in the…

Tyler 6 May 2020 • 7 min read
Allegro Package Designer

Breakfast Bytes

Computational Software: A New Paradigm for EDA Tools

Cadence has a new white paper out on Computational Software . I've written on these…

Paul McLellan 6 May 2020 • 6 min read
computational software , intelligent system design , Breakfast Bytes

Breakfast Bytes

Wally Rhines: Predicting Semiconductor Business Trends After Moore's Law

I recently attended a webinar presented by Wally Rhines about his new book, Predicting…

Paul McLellan 5 May 2020 • 7 min read
Wally Rhines , moore's law , book

Breakfast Bytes

Signoff in the Cloud

Here's a nightmare. You sign off your design with the usual margins. It is a 7nm…

Paul McLellan 4 May 2020 • 3 min read
Tempus , Voltus , power integrity signoff , signoff , timing signoff

Breakfast Bytes

Sunday Brunch Video for 3rd May 2020

www.youtube.com/watch Made on my balcony (camera Carey Guo) Monday: EDA101 Video…

Paul McLellan 3 May 2020 • less than a min read
sunday brunch

System, PCB, & Package Design 

2019 HF1 Release for Clarity, Celsius, and Sigrity Tools Now Available

The 2019 HF1 production release for Clarity, Celsius, and Sigrity Tools is now available…

SigrityReleaseTeam 1 May 2020 • 5 min read
Celsius Thermal Solver , Gds2Spd Translator , Clarity 3D Solver , Sigrity 2019 HF1 , Allegro

Breakfast Bytes

Linley Processor Conference 2020 Keynote

The Linley Processor Conference always opens with a keynote by Linley Gwenapp giving…

Paul McLellan 1 May 2020 • 6 min read
deep learning , linley processor conference , Linley , neural networks

Analog/Custom Design

Start Your Engines: AMSD Flex – Your Instant Access to Latest Spectre Features!

This blog talks about how to enable the AMS Designer flex mode.

Andre Baguenie 30 Apr 2020 • 3 min read
mixed signal design , AMS Designer , AMSD , AMSD Flex Mode , mixed-signal verification
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