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Featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP(Verification IP:VIP)を発表しました。今回発表されたVIPは…

Cadence Japan
Cadence Japan 4 Dec 2025 • less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
Cadence Japan 1 Dec 2025 • 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
Corporate 21 Nov 2025 • 1 min read
news story , Verification IP , featured
cdns - all_blogs_categories

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Blog - Post List
Latest blogs

Verification

Industry's First Adopted VIP for PCIe 7.0

Overview of PCIe 7.0 Technology PCIe technology has evolved over three decades…

Sangeeta Soni 1 Jul 2024 • 2 min read
pcie gen7 , Cadence VIP portfolio , VIP , PCIe 7.0 , PCIe

カスタムIC/ミックスシグナル

Start Your Engines: ミックスシグナル検証でのコネクトモジュールの作成と挿入

Cadence Spectre AMS Designerは、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

Custom IC Japan 1 Jul 2024 • 1 min read
AMS , AMS Designer , ミックスシグナル検証 , AMS検証 , Mixed-Signal , ミックスシグナル , AMS simulation , japanese blog , mixed-signal design , ミックスシグナルデザイン , ミックスシグナル設計 , AMS Verification , mixed-signal verification

Learning and Support

Training Insights - Effective Use of Filters to Narrow Down Search – Part 2

In our recent blog, Training Insights - The Effective Use of Filters to Narrow Down…

Sachin Nagpal 30 Jun 2024 • 2 min read
COS , Search , Cadence Online Support , training bytes

Digital Design

Voltus Voice: Breaking Ground with Voltus InsightAI—Swift Implementation via RAK

The blog discusses Voltus InsightAI RAK that is designed to give you an accelerated…

Anshika Gahlaut 30 Jun 2024 • 3 min read
artificial intelligence , Silicon Signoff and Verification , Voltus IC Power Integrity Solution , Innovus Implementation System , Generative AI , Power Integrity , Voltus InsightAI , Rapid Adoption Kits

Verification

Unraveling the PCIe ECN Unordered IO (UIO) Feature

Introduction Unordered IO (UIO) ECN is included in the PCIe 6.1 specification and…

xinmu 27 Jun 2024 • 3 min read
Verification IP , Functional Verification , PCIe 6.0 , PCI Express , verification

Digital Design

Socionext Accelerates SoC Design Breakthroughs with Cadence Signoff Tools

Socionext, a leader in SoC design, recently made significant strides in enhancing…

Sean Kobayashi 27 Jun 2024 • 1 min read
digital design , Tempus , designed with cadence , certus , Quantus , silicon signoff

Data Center

Data Center Software: Flow Network Functionality

Flow network simulation is used to create simplified network models of piping/duct…

Mark Fenton 27 Jun 2024 • 3 min read
data center , digital twin , Liquid Cooling

Corporate News

Cadence Partners with GSME to Further Semiconductor Industry Growth in Oman and the…

The global semiconductor supply chain is undergoing a profound transformation driven…

Corporate 27 Jun 2024 • 2 min read
EDA tools , cloud , semiconductors

Corporate News

Ampere Is Creating Cloud Native Processors

The current cloud computing market is large and growing rapidly. With the legacy…

Tanushri Shah 27 Jun 2024 • 1 min read
IP , Tempus , Palladium , cloud , designed with cadence , Joules , Genus Synthesis Solution , Innovus Implementation

Verification

Unveiling NOP Insertion Hint: A Performance Optimizer in CXL 3.0

Compute Express Link (CXL) is a high-speed interconnect standard that facilitates…

Jasmine Makhija 27 Jun 2024 • 3 min read
256BLOptMode , CXL3.0 , Latency Optimization , NOP Insertion Hint , latency

Verification

Tools of the Future: How Cadence Is Using AI to Change Verification

Generative AI is sweeping through every industry, re-writing the way things are done…

Tyler Sherer 26 Jun 2024 • 3 min read
autotriage , Functional Verification , verisium , pindown , codeminer , AI , waveminer

Life at Cadence

Celebrating Pride Month at Cadence: A Global Commitment to DEI

June is a time of celebration, reflection, and advocacy for the LGBTQ+ community…

Michelle Hoffmann 26 Jun 2024 • 2 min read
inclusion , featured , Pride , DEI , LGTBQ+ , diversity , life at cadence , equity

Analog/Custom Design

Doc Assistant A-Z: Making the Most of the Cadence Cloud-Based Help Viewer: Pt. 2

At a bustling Cadence event, we met Adrian, an intern at a startup who immerses himself…

Priya Sriram 26 Jun 2024 • 3 min read
In-Tool Help , user documentation , in-built help , Cloud-Based Help , Doc Assistant

Corporate News

The Rise of Cloud Computing in the Olympics

In an era where data reigns supreme, cloud computing has become a cornerstone in…

Corporate 26 Jun 2024 • 4 min read
cloud , sports , Olympics , 2024 Paris Olympics , technology , cloud computing

Computational Fluid Dynamics

LES Workflow with Turnaround Time of Less Than 10 Hours

This surge in the use of LES Solvers is primarily due to the inherent trade-offs…

Veena Parthan 25 Jun 2024 • 4 min read
Fidelity Stitch , GPU-resident , Computational Fluid Dynamics , simulation software , Fidelity Pointwise , Fidelity LES Solver

Verification

Navigating the Future of EDA: The Transformative Impact of AI and ML

The landscape of electronic design automation (EDA) is undergoing a monumental transformation…

Anika Sunda 25 Jun 2024 • 3 min read
artificial intelligence , ml , EDA , AI/ML , podcast , AI

SoC and IP

Navigating Chiplet-Based Automotive Electronics Design with Advanced Tools and F…

In the rapidly evolving landscape of automotive electronics, traditional monolithic…

Reela Samuel 25 Jun 2024 • 6 min read
Automotive , electronics , chiplets , tools and flows

Verification

Unraveling the Newly Introduced Segmentation in PCIe 6.0

Overview The PCIe protocol evolved to its sixth generation in 2021, doubling its…

meghvendra 24 Jun 2024 • 4 min read
verification strategy , Functional Verification , System Design and Verification , VIP , SoC , PCIe

カスタムIC/ミックスシグナル

Start Your Engines: ミックス・シグナルシミュレーションの効率を最適化する

Cadence Spectre AMS Designerは、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

Custom IC Japan 24 Jun 2024 • less than a min read
AMS , mixed-signal methodology , AMS Designer , Start Your Engines , AMSシミュレーション , ミックスシグナル手法 , AMS simulation , japanese blog
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