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Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Latest blogs

SoC and IP

Cadence Transforms Chiplet Technology with First Arm-Based System Chiplet

Cadence has achieved a significant milestone by designing and taping out its first…

• 4 min read
Automotive , ucie , featured , chiplets , NoC , lpddr5 , ARM

Computational Fluid Dynamics

Boosting Accuracy and Solution Time in Turbomachinery with Fidelity LES

There is a significant demand for a cost-efficient and high-fidelity LES tool tailored…

• 4 min read
CFD , turbomachinery , voronoi diagrams , Fidelity CFD , Meshing , LES

Data Center

Crank Up the Data Center Heat

The data center industry is rapidly moving towards a future of high-density computing…

• 3 min read
featured , data center , data center cooling , digital twin , data center digital twin , Cadence Reality DC

System, PCB, & Package Design 

Chip-Level Electromagnetic Crosstalk Signoff Using EMX Solver

Today’s wireless and high-speed chip designs integrate an incredible amount of functionality…

• 2 min read
Virtuoso , electromagnetic , EMX Designer , Quantus , EMX Solver

Corporate News

Accelerating Design: Semiconductors, Data Centers, and Sciences

The AI super-cycle is expected to deliver transformative growth for our global economy…

• 3 min read
featured , grace , NVIDIA , accelerated compute , grace blackwell

Digital Design

Voltus Voice: Voltus Takes to the Cloud for Next-Level Scalability

This blog explores how the Voltus solution collaborates with leading cloud providers…

• 3 min read
Silicon Signoff and Verification , Voltus IC Power Integrity Solution , Amazon Web Services , EM-IR , microsoft azure , Digital Implementation , Cloud ready , high-performance computing , cloud computing

Computational Fluid Dynamics

Hex-Core Voxel Meshes: The Best of Structured and Unstructured Meshing

The introduction of hex-core voxels marks a significant advancement by combining…

• 4 min read
Computational Fluid Dynamics , Meshing , Hex-core Voxels , Fidelity Pointwise

Corporate News

Orca Semiconductor Is Optimizing Analog ICs

Orca Semiconductor is an analog mixed-signal semiconductor manufacturer. The company…

• 1 min read
Cadence Oncloud , cloud , designed with cadence , Genus Synthesis Solution , xcelium

Corporate News

The Power of Digital Twins

By Bob O’Donnell, president and chief analyst of TECHnalysis Research While much…

• 5 min read
featured , Generative AI , digital twin , Emulation , GenAI

Digital Design

A Magical World - The Incredible Clock Tree Wizard to Augment Productivity and QoR…

In the era of Artificial Intelligence, front-end designers need a magical key to…

• 2 min read
performance , debug , training , congestion , PPAC , training bytes , clock tree synthesis , area , RTL design , power

Verification

Randomization Considerations for PCIe Integrity and Data Encryption Verification…

Peripheral Component Interconnect Express (PCIe) is a high-speed interface standard…

• 7 min read
Verification IP , Functional Verification , System Design and Verification , VIP , PCIe , PCIe 6.0 , PCIe Gen5 , IDE

Life at Cadence

Cleared to Land: An Interview with Cadence Veterans ERG Lead Johnathan Edmonds

Each November, we are reminded of the bravery and dedication of those who have served…

• 5 min read
Corporate Culture , LifeAtCadence , DEIatCadence

Life at Cadence

Celebrating Milestones: The Cadence Bangalore Toastmasters Club’s Journey

On November 5, 2024, the Cadence Bangalore Toastmasters Club celebrated a significant…

• 2 min read
Cadence Culture , Cadence India , Toastmasters , LifeAtCadence , great place to work , life at cadence

Data Center

Solutions to Maximize Data Center Performance Featured at OCP Global Summit 2024

The demand for higher compute performance, energy efficiency, and faster time-to…

• 4 min read
data center , OCP , ARM , AI

Life at Cadence

Lessons from the UMass Lowell Women’s Leadership Conference

This post was contributed by Liliko Uchida, application engineer at Cadence. Being…

• 4 min read
WomenAtCadence , life at cadence , Women in Technology

SoC and IP

Simulating Multiple Cadence DSPs as Multiple x86 Processes

An increasing number of embedded designs are multi-core systems. At the pre-silicon…

• 4 min read
Tensilica , Xtensa , SystemC , multicore , simulation , multiprocessing

Corporate News

McLaren and Cadence Are Engineering Success

Celebrated for their unparalleled engineering expertise and pioneering mindset, McLaren…

• 2 min read
CFD , Automotive , featured , designed with cadence , Fidelity CFD , McLaren Racing , Cadence CFD

SoC and IP

Redefining Hearing Aids with Cadence DSPs

Hearing is one of the most essential senses for engaging with the world. It enables…

• 4 min read
Tensilica DSPs , HiFi DSP , Fusion DSP Family , Hearing Aids

Verification

Versatile Use Case for DDR5 DIMM Discrete Component Memory Models

DDR5 DIMM Architectures The DDR5 generation of Double Data Rate DRAM memories has…

• 6 min read
ddr5 , Functional Verification , DDR5 DIMM , System Design and Verification , VIP , MRDIMM , Memory Model
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