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Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
Corporate 30 Jun 2026 • 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

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  • System, PCB, & Package Design  1018
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  • The India Circuit 93
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  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Breakfast Bytes

Andrew Kahng on PPAC Scaling Below 7nm

Last week Dr. Andrew Kahng came to town. He was at CDNLive, where his presentation…

Paul McLellan 22 Apr 2016 • 5 min read
ucsd , roadmap , ITRS , Cadence Academic Network , kahng , andrew kahng , 5nm , 7nm , power

Academic Network

Academic Track Makes Its Debut at CDNLive Silicon Valley

For the first time at CDNLive Silicon Valley, Cadence Academic Network hosted an…

susarla 21 Apr 2016 • 2 min read
Cadence Academic Network , CDNLive , academia

Breakfast Bytes

Phil Moorby and the History of Verilog

Last Saturday there was a gala event at the Computer History Museum in Mountain View…

Paul McLellan 21 Apr 2016 • 6 min read
verilog-xl , gateway design automation , SystemVerilog , Gateway , Phil Moorby , Verilog , computer history museum , chm

SoC and IP

50 Years of Turning Optical Dreams into Reality

Anaheim Convention Center (CA) was the center of a spectacle of technology that continues…

Steve Brown 20 Apr 2016 • 3 min read
Optical , PCIe Gen4 , OFC , Fiber , PCIe

Breakfast Bytes

Ann Winblad Masterclass

Normally the Stanford VLAB meets in Menlo Park, but occasionally they make a foray…

Paul McLellan 20 Apr 2016 • 5 min read
ann winblad , vlab , hummer winblad , venture capital

Whiteboard Wednesdays

Whiteboard Wednesdays - The Future of Neural Networks

In this week's Whiteboard Wednesdays video, Chris Rowen looks at the future of neural…

References4U 19 Apr 2016 • less than a min read
Whiteboard Wednesdays , IP , Chris Rowen , Tensilica , neural networks

Breakfast Bytes

Open Server Summit: How to Install 5,000 Servers Per Day

There are only a few end markets for semiconductors that really drive the technology…

Paul McLellan 19 Apr 2016 • 6 min read
Open Server Summit , servers , datacenter

Verification

Building Efficient Scoreboards

A “scoreboard” is a verification component that checks the data sent to the DUT against…

teamspecman 18 Apr 2016 • 7 min read

Breakfast Bytes

"Interoperability is the Only Way to Prove Standards Compliance"

At the recent TSMC Technology Symposium, Cadence and Mellanox demonstrated multi…

Paul McLellan 18 Apr 2016 • 3 min read
pcie 4.0 , data center , PHY , mellanox , PCIe , mobile , PCI Express

Breakfast Bytes

Memory in China: XMC

Yesterday I covered the first half of the CASPA meeting last Saturday about memory…

Paul McLellan 15 Apr 2016 • 4 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

Verification

RTL Signoff vs. Functional Signoff

The notion of signoff has many layers to it, both in terms of complexity but also…

John Brennan 14 Apr 2016 • 4 min read
funtional verification , IMC , metric driven verification (MDV) , functional coverage , MDV , vManager

Breakfast Bytes

Memory, the Turning Point of Chinese Semiconductor Industry

I can't keep away from work. Saturday found me in the Cadence auditorium for the…

Paul McLellan 14 Apr 2016 • 5 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

Breakfast Bytes

TI and UI: Texas Instruments' Experience with the Common User Interface

Cadence's tools Genus, Innovus, and Tempus have a lot of functionality in common…

Paul McLellan 13 Apr 2016 • 3 min read
Genus , Tempus , Joules , Voltus , Innovus , Bob Sussman , Texas Instruments , TI , Breakfast Bytes , common UI

Whiteboard Wednesdays

Whiteboard Wednesdays - Common Infrastructure Between Simulation VIP and Accelerated…

In this week's Whiteboard Wednesdays video, Arindam Guha discusses the common infrastructure…

References4U 12 Apr 2016 • less than a min read
accelerated VIP , Verification IP , simulation VIP , simulation

Academic Network

Cadence Participates in 14 Spring Career Fairs

Rain or snow does not stop our Cadence employees from being the perfect brand ambassadors…

susarla 12 Apr 2016 • 1 min read
university , Cadence Academic Network , campus recruitment , academia

System, PCB, & Package Design 

What's Good About the latest RF PCB? New capabilities in 16.6-2015!

The 16.6-2015 RF PCB release contains many new features and updates. Read on for…

Jerry GenPart 12 Apr 2016 • 4 min read
RF , Cadence Design Systems , 16.6 , SPB , Grzenia , Allegro

Breakfast Bytes

Qualcomm Looks to the Future: Steve Mollenkopf's CDNLive Keynote

Steve Mollenkopf, the CEO of Qualcomm Incorporated, gave one of the keynotes at CDNLive…

Paul McLellan 12 Apr 2016 • 4 min read
mollenkopf , CDNLive , IoT , Qualcomm , Internet of Things , drone , mobile , Snapdragon , CDNLive Silicon Valley , ARM , datacenter , Breakfast Bytes

Verification

Modelling a Value Holder Template with the Value “new-ed” by Default

In many companies, there is a well-defined flow for handling monitored data items…

teamspecman 11 Apr 2016 • 2 min read
IEEE 1647 , Specman , tech tips , e , e language , specman elite , Aspect Oriented Programming , AOP , verification

Breakfast Bytes

Jim Hogan and the Early Days of Virtuoso

I had lunch with Jim last week to get a little color on the early days of the Virtuoso…

Paul McLellan 11 Apr 2016 • 3 min read
Hogan , james spoto , national , Virtuoso , daisy systems , chipmaster , Jim Hogan , SDA , SKILL
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