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Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution

Today, AI infrastructure is driving a fundamental shift in semiconductor design.…

Corporate
• 7 min read
featured , chiplets , infrastructure ai , SF2P , physical ai

Corporate News

Cadence Certifies AI-Driven Reference Flows for Intel 18A-P and Intel 14A

The expanded Cadence-Intel Foundry collaboration delivers silicon-proven digital…

Corporate
• 3 min read
DAC , Design IP , featured , DAC 2026 , AI-Driven Design

Corporate News

The Autonomous Chip-to-System Engineer Has Arrived

How Cadence, in collaboration with NVIDIA, is building the industry's first silicon…

Corporate
• 4 min read
AuraStack AI Super Agent , DAC , featured , agentic ai , NVIDIA

Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

IC Packagers: Rule Your Package Designs

When it comes to package design, spacing often reigns supreme. The location readout…

• 4 min read
SiP Layout

Breakfast Bytes

Ford: Automotive OEM to Software Manufacturer?

Soon after Marc Andreesen founded the venture capital firm Andreesen-Horowitz (a16z…

• 7 min read
Automotive , ADAS , autonomous vehicles , automobil elektronik kongress , Ford

Breakfast Bytes

HOT CHIPS: Chipletifying Designs

At HOT CHIPS last week, one of the themes that ran through several of the presentations…

• 3 min read
chiplet , hot chips

Breakfast Bytes

Sunday Brunch Video for 25th August 2019

https://youtu.be/RUWt6mOAUUU Made at EBC (camera Sean) Monday: HOT CHIPS 2019 …

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Ken的博客系列之三 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：PCB互连的预布局建模 IBIS-AMI建模 假设我们的PCIExpress Gen 4串行链路，使用初始的PCB走线和过孔模型…

• less than a min read
SI , Chinese blog , ddr5 , 仿真分析 , DDR4 , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性 , SI分析与建模

Breakfast Bytes

HOT CHIPS: Microsoft Hololens 2

The very last presentation at HOT CHIPS earlier this week was by Elene Terry of Microsoft…

• 3 min read
hololens , microsoft , Tensilica

Verification

Automotive Security in the World of Tomorrow - Part 2 of 2

If you missed the first part of this series, you can find it here . So: what does…

• 2 min read
security , Automotive , Functional Verification , Green Hills Software

Analog/Custom Design

Virtuosity: An Introduction to Modgen

This blog provides an overview of Virtuoso Module Generator, also referred to as…

• 3 min read
EAD , Modgen On Canvas , MODGEN , automation , Automatic Placement , module generation , Module Generator , Layout , Custom IC Design , modgens , Virtuoso Layout Suite , Virtuoso Layout Suite XL

Breakfast Bytes

HOT CHIPS: The Biggest Chip in the World

At HOT CHIPS earlier this week, Cerebras announced the biggest chip in the world…

• 6 min read
artificial intelligence , deep learning , cerebras , wafer scale integration , TSMC , hot chips , AI

Verification

Automotive Security in the World of Tomorrow - Part 1 of 2

Autonomous vehicles are coming. In a statistic from the U.S. Department of Transportation…

• 3 min read
security , Automotive , Functional Verification , Green Hills Software

Analog/Custom Design

SPECTRE 19.1 Release Now Available

The SPECTRE 19.1 production release is now available for download.

• 1 min read
Dynamic Checks , Spectre Fault Analysis , SPECTRE 19.1 , Spectre X Simulator

Breakfast Bytes

TSMC Museum of Innovation

When I was in Taiwan for CDNLive Taiwan, I visited the TSMC Museum of Innovation…

• 4 min read
TSMC , museum , tsmc museum of innovation

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Six Things to Do Before You Actually Place Components…

It's a PCB you are designing. Where do you start? What can you do to make your process…

• 6 min read
PCB Editor

System, PCB, & Package Design 

IC Packagers: Choosing the Right Netlist to Match Your Needs

Netlists. Everyone needs them! But what you are using your netlist for can have a…

• 4 min read
APD , IC Packaging & SiP design , SiP Layout

Breakfast Bytes

CDNLive India 2019 Preview

CDNLive India is coming up next week. It will be August 28 and 29 at the Radisson…

• 4 min read
CDNLive India , CDNLive , bengaluru

Breakfast Bytes

HOT CHIPS 2019

This week is HOT CHIPS. It has moved from the Flint Center at De Anza College, where…

• 5 min read
hot chips

定制IC芯片设计

Virtuosity: ADE What’s New 中文版上线!

您知道当您有感情需要抒发时，脱口而出便是母语。想知道为什么吗？这是我们与生俱来的本能。我们一般使用英语作为商业通用语言，但是我敢打赌，如果换成是自己的母语，大家会感到更开心舒适…

• less than a min read
Chinese blog , Cadence blogs , ICADVM18.1 , ADE Explorer , ADE , Virtuosity , Custom IC Design , ADE Verifier , IC6.1.8 , ADE Assembler

Analog/Custom Design

Virtuoso Meets Maxwell: Here's All You Must Know to Create a TILP

Did you get a chance to look at the outstanding posts about Technology Independent…

• 3 min read
ICADVM18.1 , Virtuoso New Design Platform , video , Virtuoso Meets Maxwell , Virtuoso RF , RF design , TILP , Custom IC Design , Virtuoso Layout Suite , technology

System, PCB, & Package Design 

DATA Pulse: Playing Favorites with Parts—Influencing Design Part Selection with a…

Life is full of decisions - what college major to opt for, which career path to follow…

• 3 min read
allegro edm , PCB design
CDNS - Fix Layout Hompage