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Corporate News

Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution

Today, AI infrastructure is driving a fundamental shift in semiconductor design.…

Corporate
• 7 min read
featured , chiplets , infrastructure ai , SF2P , physical ai

Corporate News

Cadence Certifies AI-Driven Reference Flows for Intel 18A-P and Intel 14A

The expanded Cadence-Intel Foundry collaboration delivers silicon-proven digital…

Corporate
• 3 min read
DAC , Design IP , featured , DAC 2026 , AI-Driven Design

Corporate News

The Autonomous Chip-to-System Engineer Has Arrived

How Cadence, in collaboration with NVIDIA, is building the industry's first silicon…

Corporate
• 4 min read
AuraStack AI Super Agent , DAC , featured , agentic ai , NVIDIA

Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent
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Blog - Post List
Latest blogs

Academic Network

Cadence and the Academic Network Support Design Contests in the Asia Pacific

Design contests are a unique way for students to get hands-on experience using Cadence…

• 2 min read
university , academia , Academic Network , university program

Breakfast Bytes

Ten Reasons to Attend CDNLive Israel

CDNLive Israel is coming up later this month on September 18 at the David Intercontinental…

• 3 min read
CDNLive , cdnlive israel

Breakfast Bytes

Conformal Litmus

One of the earliest science experiments I can remember doing was crushing red cabbage…

• 2 min read
conformal , litmus , Equivalence Checking

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Component Placement - Get Set and Go!

How do you place components on a PCB design? Manually? Or quickly using automation…

• 4 min read
PCB Editor

System, PCB, & Package Design 

IC Packagers: Manufacturing Cross-Hatched Shapes

If you use cross-hatched shapes in your package design, you are doubtless aware of…

• 3 min read
SiP Layout

Breakfast Bytes

HOT CHIPS: The Tesla Full Self-Driving Computer

On April 22, Tesla held its Autonomy Day. They announced their "Self-Driving Computer…

• 4 min read
Automotive , hotchips , tesla

Analog/Custom Design

Virtuosity: Device-Level Routing for Advanced Nodes – Trunk-to-Trunk Mesh Routin…

This blog highlights the importance of trunk-to-trunk mesh routing feature for providing…

• 3 min read
trunk mesh routing , Trunk generation , Interactive Routing , Pin to Trunk , structured routing , ICADVM18.1 , Virtuoso Space-based Router , mesh routing , Layout EXL , trunk-to-trunk mesh , Layout Suite , trunk creation , Generate Trunk , mixed signal , Finish Trunk , EM Trunk Optimization , Custom IC Design , Virtuoso Layout Suite , Custom IC

Breakfast Bytes

Sunday Brunch Video for 1st September 2019

https://youtu.be/_DiWWBDQbGc Made at CDNLive India (camera Corrie Callenbach) Monday…

• less than a min read
sunday brunch

Life at Cadence

Girls Who Code Reflect on Their Summer at Cadence!

This summer, 21 tenth- and eleventh-grade girls came to Cadence’s San Jose campus…

• 4 min read
Insights on Culture , Culture , STEM , cadence , Girls Who Code , women

Life at Cadence

Interns Making an Impact

Being an intern at Cadence was a rewarding and impactful experience that kickstarted…

• 3 min read
Insights on Culture , Culture , cadence , internship , chips

Breakfast Bytes

Labor Day Off-Topic: Have You Been to Suomi?

If you've been in the semiconductor, electronics, or mobile business for some time…

• 5 min read
off-topic

Analog/Custom Design

Virtuosity: Automated Device Placement and Routing—Row-based Device Placement

In this blog, I will focus on the automated placement step that is powered by an…

• 3 min read
Automatic Placement , Virtuoso Placer , Auto P&R , Virtuosity , Virtuoso Placement , Custom IC Design

The India Circuit

CDNLive India 2019: And The Best Paper Award Goes To...

What a whirlwind of two months it has been! And it has been totally worth it, with…

• 1 min read
CDNLive India , CDNLive , cadence , Cadence India , UserConference

PCB、IC封装：设计与仿真分析

Ken的博客系列之四 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：IBIS-AMI建模 启用约束驱动设计 通过构建预布局测试平台，填入相关模型，生成结果逼真的仿真结果，这时候正适合启用约束来驱动和控制串行链路的物理布局…

• less than a min read
SI , Chinese blog , ddr5 , 仿真分析 , DDR4 , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性 , SI分析与建模

Breakfast Bytes

HOT CHIPS: Intel

At HOT CHIPS in August, Intel was everywhere. The two announcements that I'm going…

• 3 min read
Intel , spring hill , deep learning , Vision P6 , accelerator , Tensilica , AI

System, PCB, & Package Design 

BoardSurfers: PCB Design Technique for Designing a Small RF Section in a Digital…

Are you designing a 5G or radar application, or for that matter any application,…

• 3 min read
5G , RF PCB , Allegro PCB Editor

Analog/Custom Design

Spectre Xplored - The New Spectre X Simulator

New Spectre X Simulator enables large-scale simulation for complex analog, RF, and…

• 2 min read
Circuit simulation , simulation performance , ADE , Spectre Tech Tips , Virtuoso Analog Design Environment , Spectre , simulation

Breakfast Bytes

CDNLive China 2019

A couple of weeks ago it was CDNLive China in Shanghai. (To read about how I got…

• 6 min read
CDNLive , cdnlive china

Digital Design

Now Access Online Support Directly from the Tool Interface

As designs become complex and performance targets increase, time shrinks. Designers…

• 1 min read
Digital Implementation forums , Cadence Online Support , Digital Implementation , Innovus
CDNS - Fix Layout Hompage