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Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Blog - Post List
Latest blogs

Breakfast Bytes

Lifting the Veil on Hololens

The opening keynote at the Embedded Vision Summit in Santa Clara was by Marc Pollefeys…

• 7 min read
hololens , microsoft , Embedded Vision Summit , Tensilica , vision , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview June 5th to June 9th 2017

https://youtu.be/C7nOhT8ey7g Coming from Cadence Cafeteria (camera Sean) …

• less than a min read
DAC , 54dac , palldium , Protium , embedded vision , Embedded Vision Alliance , silicon photonics , #54dac , Design Automation Conference

Breakfast Bytes

Embedded Vision Summit: "It's a Visual World"

"It's a visual world," Tim Ramsdale of ARM said at one point in the recent Embedded…

• 12 min read
embedded vision , deep neural networks , Tensilica , convolutional neural networks , neural nets , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Vision C5 DSP: A Solution to Current Challenges and Trends…

In this week's Whiteboard Wednesdays video, Megha Daga talks about how Cadence did…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks

Breakfast Bytes

Virtuoso System Design Platform

Cadence was already talking about chip-package-board back in 2000 when I was putting…

• 3 min read
package , board , 2.5D packagin , Virtuoso , 3D packaging , interposer , Sigrity , Custom IC , Breakfast Bytes , Allegro

Academic Network

10 years Academic Network at CDNLive EMEA, a Reason To Celebrate!

From 15-17 May CDNLive EMEA opened again its doors for around 700 attendees from…

• 5 min read
Cadence Academic Network , CDNLive , BarCamp , Functional Verification , academic workshop , academia , MEMS Design Contest , CDNLive EMEA , Cadence Design Contest , university program

Analog/Custom Design

Virtuoso Video Diary - Filtering Your Way Through Corners

Have you ever looked at the Corners Setup form and wished you had some way of finding…

• 4 min read
Analog Design Environment , ADE Explorer , Explorer , Analog Simulation , ADE , Virtuoso , Analog Design Environment , Virtuosity , Virtuoso Video Diary , Custom IC Design , ADE Assembler

Breakfast Bytes

HOT Party Remembers Gary Smith...and the Denali Party

Every year at DAC, Heart of Technology (HOT) organizes a charity event. This year…

• 2 min read
DAC , HOT , Heart of Technology , Gary Smith , sjsu , Design Automation Conference , Breakfast Bytes

System, PCB, & Package Design 

Epic Western Movies and PCB Design. Seriously.

I love that recently Westerns movies are making a comeback. Something about the romanticism…

• 2 min read
PCB , PCB Layout and routing , Routing , PCB Co-Design , Symphony , Team design , PCB Editor , PCB design , Allegro PCB Editor , Allegro

Breakfast Bytes

Open-Source Silicon

At the RISC-V workshop in Shanghai, the keynote on the second day was by Bunnie Huang…

• 12 min read
security , open source silicon , root of trust , bunnie huang , open source hardware , open source , Breakfast Bytes

Verification

Have You Fully Verified Your Multi-Core, Cache-Coherent SoC? Find Out How we Can…

You might have thought it would be “just another DAC” this year, again in Austin…

• 3 min read
DAC , SoC verification , Perspec , pss , Accellera PSS

Breakfast Bytes

What's For Breakfast? Video Preview May 29th to June 2nd 2017

https://youtu.be/xTdQCRRme8U Coming from Mexico City, Mexico (camera Yuan Yuan…

• less than a min read
hololens , microsoft , deep learning , embedded vision , Tensilica , Virtuoso

System, PCB, & Package Design 

How Your PCB Design Team Can Become Your Dream Team for Power Integrity

Cadence’s Sigrity team speaks to a lot of power integrity tool users. Experts in…

• 3 min read
PCB , PI , PDN , Power Integrity , Layout , Sigrity , simulation , Schematic

Breakfast Bytes

RISC-V Shanghai 二

This is my second (二 in Chinese) post about the 6th RISC-V workshop held in early…

• 8 min read
computer architecture , risc-v , isa , instruction set architectures , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Convolutional Neural Network Challenges: Bandwidth Requi…

In this week's Whiteboard Wednesdays video, Megha Daga takes a deep dive into bandwidth…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks , bandwidth

Breakfast Bytes

Fifty Years of Computer Architecture: The Last 30 Years

As part of the RISC-V workshop, Dave Patterson gave a talk on computer architecture…

• 6 min read
risc-v , CISC , AMD , titanium , vliw , RISC , Breakfast Bytes

Breakfast Bytes

Fifty Years of Computer Architecture: The First 20 Years

As part of the RISC-V workshop, Dave Patterson gave a talk on computer architecture…

• 6 min read
Intel , risc-v , CISC , RISC , ibm 360 , Breakfast Bytes , dave patterson

Breakfast Bytes

Dream Chip: A Vision for Your Car

Dream Chip is a company based in Germany just outside Hannover. Martin Zeller presented…

• 4 min read
Automotive , dreamchip , 22fdx , ADAS , GlobalFoundries , Breakfast Bytes , FD-SOI

Analog/Custom Design

Virtuosity: Is it Possible to Create a Bus on Several Metal Layers Simultaneously…

Routing Multiple Nets on Different Metal Layers to Gain Productivity Have you…

• 7 min read
transitioning capabilities , space-based router , weAddCustomTransitionMenuItem , customizing multi-layer bus , weRemoveCustomTransitionMenuItem , custom layer pattern , switching bus bits , weGetCustomTransitionMenuItems , multi-layer bus , stacked wires , Layout , Virtuosity , revert to multi-layer bus
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