Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Verification

e Templates and e Macros -- An Update for Specman Users

A couple of recent blogs have mentioned the feature of e templates, which was added…

• 2 min read
Specman , Functional Verification , Incisive , e , team specman , macros , AOP , IES-XL

SoC and IP

Apple boots HDD--completely out of the new MacBook Air notebooks. SSD is the only…

Claiming that the move unifies Apple’s product line, Steve Jobs yesterday announced…

• less than a min read

Verification

Team Verify at CDNLive Silicon Valley Next Week – ABV, Formal, Multi-Engine Verification…

At next week's CDNLive! Silicon Valley in San Jose, California, Cadence will cover…

• 1 min read
NextOp , IP , ABV , methodology , Zocalo , CDNLive , Functional Verification , Formal Analysis , formal , EDA360 , Incisive , Silicon Realization , assertion synthesis , IEV , IFV

Verification

A Preview of Verification Sessions at CDNLive! Silicon Valley

As Cadence followers well know, our annual worldwide series of CDNLive! events is…

• 2 min read
uvm , ABV , CDNLive , OVM , MDV , techtorial , verification

System, PCB, & Package Design 

What's Good About Allegro Router and Via Changes? SPB16.3 Has a Few New Enhancements

This week, I’ll be closing discussions on the new SPB16.3 Allegro PCB Router improvements…

• 3 min read
PCB , PCB Layout and routing , SPB16.3 , Routing , specctra , Allegro 16.3 , layer stacks , SPB 16.3 , SPB , PCB Editor , Layout , via , PCB design , Allegro PCB Editor , microvia , Allegro

Digital Design

Five-Minute Tutorial: ecoAddRepeater

In today's tutorial, we're going to talk about the Encounter Digital Implementation…

• 3 min read
EDI system , tutorial , encounter , Digital Implementation , five minute , ecoAddRepeater

SoC and IP

Angelbird Ltd. Introduces “Wings,” a low-cost PCIe SSD for PCs. $239 for 16 Gbyt…

Stop me if you’ve heard this one. The fastest way to get high performance from an…

• less than a min read

SoC and IP

Hitachi-LG Data Storage fixes optical drive with SSD assist to use one SATA port

Hitachi-LG Data Storage has updated the hybrid optical/SSD drive it announced earlier…

• less than a min read

SoC and IP

Made in South Korea: Graphene memristor memory cells on a flexible plastic subst…

IEEE Spectrum has just reported on the successful fabrication of graphene-based memory…

• 1 min read

SoC and IP

Brian Fuller @EETimes: Renesas to put MRAM in 90nm microcontrollers by 2013

EETimes’ Brian Fuller is blogging live from the Renesas DevCon down in southern California…

• 1 min read

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Customizable Datatips? Look to SPB16.3 and See

In pre-select mode Allegro displays a datatip that provides information about the…

• 5 min read
PCB , PCB Layout and routing , SPB16.3 , Allegro 16.3 , SPB 16.3 , property , PCB Editor , PCB design , Allegro PCB Editor , PCB Capture , Allegro

Digital Design

3D-IC TSV Realization: The Race Has Begun!

3D IC discussions are creating quite a buzz these days. No conference is complete…

• 3 min read
packaging , 3D-IC , 3DIC , TSV , Floorplanning , Test , Digital Implementation , 3D , thermal

Verification

Connections Partner NextOp on Assertion Synthesis and Assertion-Based Verification…

As anyone working in Formal and Assertion-Based Verification (ABV) knows, the task…

• 1 min read
Cadence Connections , NextOp , ABV , CDNLive , Functional Verification , formal , EDA360 , assertion synthesis , IEV , IFV

SoC and IP

Sandforce Enterprise-Class SSD 2500/2600 processors deliver double performance

SandForce has just announced a new enterprise-class SF-2000 SSD processor family…

• less than a min read

Verification

Video: Interview With NextOp CEO Yunshan Zhu on Assertion-Based Verification (ABV…

What makes a startup "hot"? To be sure, trade press and blogger attention helps.…

• 1 min read
Cadence Connections , NextOp , DAC , ABV , CDNLive , Functional Verification , Formal Analysis , formal , EDA360

SoC and IP

Anandtech reports that Intel’s new SSDs that incorporate 25nm Flash will have 4x…

This blog previously reported that Intel will be rolling out new versions of its…

• less than a min read

Verification

"We Want UVM 1.0! When Do We Want it? Now!"

Short of holding signs and yelling slogans, the 12 customers I visited in the past…

• 3 min read
SystemVerilog , uvm , OVM ML , OVM , VIP , OVM e , EDA360 , Incisive , OVM SV , AMIQ , Accellera VIP TSC , IES , VMM , IES-XL

Analog/Custom Design

Things You Didn't Know About Virtuoso: ADE XL--Take This Job and...Run It!

Sometimes these articles just write themselves... Last week, 3 different people asked…

• 3 min read
Analog Simulation , analog , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

System, PCB, & Package Design 

What's Good About AMS Simulator Fonts, Models, and More? It's in SPB16.3!

The SPB16.3 release of the Allegro AMS Simulator environment contains a few additional…

• 2 min read
SPB16.3 , AMS , AMS simulator , SPB 16.3 , PSPICE , SPB , AMS simulation , Design Entry , library
CDNS - Fix Layout Hompage