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Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Blog - Post List
Latest blogs

Verification

The Eternal Debate: "Like" vs. "When" Inheritance

First: Happy New Year, Specmaniacs! Much like the rivarly between the New York Yankees…

• less than a min read
IEEE 1647 , Specman , verification strategy , Functional Verification , e , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

Digital Design

Coming This Friday January 9th: Encounter Digital Implementation Office Hours

Happy New Year everyone! I hope you all had a restful, enjoyable and healthy holiday…

• 1 min read
Digital Implementation forums , chat , Encounter Digital Implementation

Verification

Power tool: The Reflection API

One endless source of neat little tricks is the Reflection API built into Specman…

• 1 min read

Verification

Metric-Driven Verification in a Box...

In my last few posts, I was explaining our focus here in Cadence Verification on…

• 1 min read
metric driven verification (MDV) , Functional Verification , Open Verification Methodology , Cadence VIP portfolio , OVM , VIP , Coverage-Driven Verification , CDV , e , Verification IP modeling , eRM

Verification

Make Your Command Line Life Easier With "specman -e"

Hi All, It always amazes me to see just how many Specman users make use of the interactive…

• 1 min read
Specman , Incisive Enterprise Simulator (IES) , IES

Verification

Who said Cadence Can't Invent New Technology Anymore?

I and the rest of the Cadence C-to-Silicon Compiler (CtoS) team were thrilled yesterday…

• 1 min read
deepchip , System Design and Verification , C-to-Silicon

Verification

Shout-out: Q1 2009 DV Club Schedule Posted

Last month I had the pleasure of attending a DV Club lunch presentation on analog…

• less than a min read
events , verification strategy , Verification methodology , Functional Verification

Verification

Thanks for a Great 2008!

Even though 2008 will probably go down in history as the year of Doom and Gloom we…

• 1 min read

Digital Design

It’s the Season of Giving – Send Me Your Design Innovations!

In the last blog, I wrote about innovating your way out of recession with new designs…

• 2 min read
digital Implementationg , innovation , encounter

Verification

Using e Ports

The other day I saw some posts to the Yahoo Specman group regarding e ports. The…

• 3 min read
IEEE 1647 , Specman , verification strategy , Verification methodology , Testbench simulation , e , Verification IP modeling , eRM , Incisive Enterprise Simulator (IES) , IES

Verification

Quickly Create and Manage e Functional Coverage

As a verification engineer, I have always found creating coverage code to be one…

• 3 min read
IEEE 1647 , Specman , Verification methodology , metric driven verification (MDV) , Functional Verification , MDV techtorial , Coverage-Driven Verification , CDV , e , Enterprise Manager , Enterprise Planner , coverage driven verification (CDV)

System, PCB, & Package Design 

Thank You!

As the 2008 year comes to a close, I wanted to say Thank You! Thanks to the hard…

• 1 min read
PCB design

Verification

Video Demo: “irun” – The Way to run Simulations!

The irun utility provides a use-model to run simulations with Incisive Simulator…

• less than a min read
Functional Verification , Incisive Enterprise Simulator (IES)

System, PCB, & Package Design 

What's Good About the SPB16.2 PSpice Models? BSIM4 Support!

The SPB16.2 release now has new MOSFET device Model BSIM4 Support in PSpice PSpice…

• 4 min read
RF , SPB 16.2 , PCB design , BSIM4 , MOSFET

Verification

Is it Necessary to Improve the Quality of Consumer Electronics?

Fellow blogger Joe Hupcey passed along a link covering the recent launch of the BlackBerry…

• 4 min read
System Design and Verification , software acceleration , blackberry , Enterprise Manager , ISX

Verification

Constraint Layering - Fine Tuning Your Environment - Part 2

In my last post , I talked briefly about constraint layering in which I gave an extremely…

• 4 min read
IEEE 1647 , Specman , verification strategy , Verification methodology , Functional Verification , Testbench simulation , e , Aspect Oriented Programming , IES , AOP

Analog/Custom Design

Video Chat with Lead Architect of Virtuoso Accelerated Parallel Simulator

Virtuoso Accelerated Parallel Simulator was just released and I asked Ilya Yusim…

• 1 min read
mixed-signal simulators , MMSIM , Circuit Design , Simulators , Custom IC Design , custom design technology

Digital Design

Become an Encounter Digital Implementation System Specialist and Win Cool Prizes

Last week, we announced the Encounter Digital Implementation System along with a…

• less than a min read

Verification

New Technical Blog on e & Specman Technology

Specmaniacs of the world: rejoice! Members of Team Specman have just launched their…

• less than a min read
IEEE 1647 , Specman , e
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