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Latest Blog Posts

  • Analog/Custom Design: Virtuoso Meets Maxwell: Defining Standard Library Components

    Tyler
    Tyler
    The Allegro Package Designer product line offers everything needed to take an IC package from idea to manufactured part, and this is where the journey takes us today. It is available from your Virtuoso environment as Virtuoso MultiTech Framework.
    • 7 Dec 2020
  • Digital Design: Pegasus: Get your Wings

    Sarita Sharma
    Sarita Sharma
    Pegasus: Get your Wings is a blog series to showcase the capabilities of Pegasus and to familiarize you with its notable features.
    • 7 Dec 2020
  • Breakfast Bytes: CadenceCONNECT: Mission Critical - Tom Beckley's Keynote

    Paul McLellan
    Paul McLellan
    In October, we held the CadenceCONNECT: Mission Critical event, focused on aerospace and defense (A&D). Tom Beckley gave the opening keynote. By background, many of the senior people in A&D historically knew little about electronics, nev...
    • 7 Dec 2020
  • Breakfast Bytes: Sunday Brunch Video for 6th December 2020

    Paul McLellan
    Paul McLellan
    https://youtu.be/r7utPfsdcKk Made in front of my living room fire Monday: What Is a Capability? CAP, CHERI, and Morello Tuesday: Cadence and Standards...and a New Codec for Your Phone Wednesday: Photonic Integration — From Switching to Computin...
    • 6 Dec 2020
  • Enabling and Empowering OEMs to Design Chips

    Life at Cadence: Enabling and Empowering OEMs to Design Chips

    Corporate
    Corporate
    Introduction Today, many original equipment manufacturers (OEMs), especially new-generation OEMs, are not shying away from taking ownership of their system-on-chip (SoC) designs and thereby sharing the IP rights with the chip makers. Traditional OEMs...
    • 5 Dec 2020
  • Breakfast Bytes: Innovus for Digital 3D-IC Designs

    Paul McLellan
    Paul McLellan
    A few weeks ago, there was a webinar about designing 3D-ICs with Innovus Implementation. Although it was not the topic of the webinar, I should point out that if your die is more custom/analog, then you can also design 3D-ICs in the Virtuoso env...
    • 4 Dec 2020
  • カスタムIC/ミックスシグナル: Spectre Tech Tips: EMIR解析におけるSpectre Xの価値

    Custom IC Japan
    Custom IC Japan
    EMIR解析は回路シミュレーションの中でも難易度の高い分野の一つです。それは、後に実行されるIRドロップおよびEM電流解析のために、電力および/または信号ネットの寄生を保存する必要があります。同時に、EMIR解析では、ファウンドリで定義された電流制限に対してEM電流をチェックするために、SPICEのような精度が必要となります。Cadenceのトランジスタ・レベルのEMIR解析ツールであるVoltus-Fi XLは、Spectre EMIRソリューションを使用して、回路の動作をシミュレートし、IR...
    • 3 Dec 2020
  • Analog/Custom Design: Virtuosity: Conserve Power—Verifying a Design Using Conformal Low Power

    bsachin
    bsachin
    If you have been following the Conserve Power blog series, you will probably have an idea of what next I am going to talk about. Yes, we have now reached the finale, the last and the most intriguing piece in the entire story. It is the formal verification and sign-off of the IP to make it ready to be integrated into an SoC.
    • 3 Dec 2020
  • Analog/Custom Design: Virtuoso Video Diary: Why Split Symbols?

    Parula
    Parula
    A blog that tells you about why splitting up blocks has now become a useful feature in more complex designs and advanced technology.
    • 3 Dec 2020
  • Breakfast Bytes: Google's DeepMind's AlphaFold Solves Protein Folding

    Paul McLellan
    Paul McLellan
    Solving protein folding has been a challenge for at least 50 years. You probably know that proteins are made up of amino acids, of which there are just 20. They are linked into long chains. How proteins behave depends on how they fold up. For ex...
    • 3 Dec 2020
  • System, PCB, & Package Design : BoardSurfers: How to Install Allegro ECAD-MCAD Library Creator Server?

    Sanjiv Bhatia
    Sanjiv Bhatia
    In addition to reducing package creation time by 60-80%, Cadence Allegro ECAD-MCAD Library Creator has the Library Creator repository, which provides thousands of ready-to-use packages and templates. The repository allows centralized configuration-controlled storage...
    • 2 Dec 2020
  • Digital Design: Innovus Design Metrics: Visualize This!

    VNelson
    VNelson

    To arrive at your targeted and optimized PPA, you will need to execute several Innovus runs with a variety of design parameters, commands, and options.

    You will then need to analyze the data which could mean wading through several log files and timing reports, a time-consuming task at best.

    To make it easier to visualize the data by generating an easy-to-read dashboard, Innovus now has integrated metrics commands. These…

    • 2 Dec 2020
  • Analog/Custom Design: Virtuosity: Our Design Thinking Approach to Enhance User Interfaces across Cadence Products

    KomalJohar
    KomalJohar
    Read our story about how teams across Cadence, diligently work towards enhancing your experience by continuously improving the quality of user interfaces from a usability aspect.
    • 2 Dec 2020
  • Breakfast Bytes: Photonic Integration — From Switching to Computing

    Paul McLellan
    Paul McLellan
    Last Tuesday was the first day of the virtual event CadenceCONNECT: Photonics Contribution to High-Performance Computing. Note that the subtext of this is actually using silicon photonics for performing high-performance computing, not just providing ...
    • 2 Dec 2020
  • System, PCB, & Package Design : IC Packagers: Adding Multiple Component Instances without a Schematic

    Tyler
    Tyler
    More package designers these days, with the increasing component counts and more complicated electrical constraints, are shifting to using a front-end schematic capture tool. As with IC and PCB design, this allows for verification between the logical...
    • 1 Dec 2020
  • Breakfast Bytes: Cadence and Standards...and a New Codec for Your Phone

    Paul McLellan
    Paul McLellan
    A lot of EDA and IP is increasingly based around standards. As a result, Cadence is actively participating in and contributing to standards bodies such as IEEE, JEDEC, Accellera, and Si2 to name a few. Here are the most recent standards that we have ...
    • 1 Dec 2020
  • PCB解析/ICパッケージ解析: Clarity、Celsius、およびSigrityツールの2019 HF4リリース(2020年11月) - 新機能ハイライト

    SPB Japan
    SPB Japan
    Clarity, Celsius, Sigrityツールの2019 HF4プロダクト・リリースがCadence Downloadsサイトからダウンロード可能となりました。2019 HF4リリースにおけるCCRの改修項目は、インストール階層に含まれているREADME.txtをご参照ください。 SIGRITY2019 HF4 以下では、Clarity, Celsius, Sigrityツール - 2019 HF4プロダクト・リリースの主なアップデートをいくつか紹介します。これらの機能や他のすべて...
    • 30 Nov 2020
  • カスタムIC/ミックスシグナル: Start Your Engines: ブログメーターの確認-2周目

    Custom IC Japan
    Custom IC Japan
    Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。 ブログメータ...
    • 30 Nov 2020
  • Learning and Support: The Latest UVM Training Byte from Cadence - Top Five Things That Break with UVM-IEEE (and How to Fix Them).

    BrianD
    BrianD
    Cadence Education Services have released our latest advanced UVM Training Byte (TB) video on support.cadence.com. This TB covers issues when migrating to UVM-IEEE. UVM is the dominant testbench methodology for ASIC and IC design. For many years UVM w...
    • 30 Nov 2020
  • What Is a Capability? CAP, CHERI, and Morello

    Breakfast Bytes: What Is a Capability? CAP, CHERI, and Morello

    Paul McLellan
    Paul McLellan
    At the recent Arm DevSummit, one of the presentations mentioned CHERI and the Arm Morello board in passing. This was in the context of using capabilities (perhaps) in some future Arm processors to increase the amount of memory safety, and to protect ...
    • 30 Nov 2020
  • System, PCB, & Package Design : BoardSurfers: Units, Accuracy, and Artwork - How to Do It Right!

    BarbS
    BarbS
    It might seem simple, but database units and accuracy directly relate to the artwork generated, and it is possible to misunderstand the artwork format as it relates to the board setup. Thirty years ago, databases were set up as Mils (0.0) or Mil...
    • 25 Nov 2020
  • カスタムIC/ミックスシグナル: SPECTRE 20.1 リリースが利用可能になりました

    Custom IC Japan
    Custom IC Japan
    SPECTRE 20.1 リリースは、Cadence Downloadsからダウンロード可能です。   SPECTRE 20.1 サポートされているプラットフォーム、インストール情報、製品ドキュメントへのアクセス方法、およびこのリリースで解決された主要な問題の詳細についてはREADME.txtファイルを参照してください。 SPECTRE20.1リリースで行われた重要な更新の一部を次に示します: Spectre XのSpectreRF解析Spectre Xは、pss、harmonic...
    • 24 Nov 2020
  • カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: RFモジュールの配線とボンドワイヤのフル3D解析

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC...
    • 24 Nov 2020
  • Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 4

    Parula
    Parula
    We live in a complex world where it is essential to use and combine tools and platforms as efficiently as possible with all available features. In this blog, we are happy to show you how easy it can be to get best results using the Spectre Simulation Platform and its corresponding options.
    • 24 Nov 2020
  • Analog/Custom Design: Virtuoso ICADVM20.1 ISR15 and IC6.1.8 ISR15 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The IC6.1.8 ISR15 and ICADVM20.1 ISR15 production releases are now available for download.
    • 23 Nov 2020
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