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Verification: How to Verify LPDDR5 from IP to System Level?

Thierry Berdah

LPDDR5 DRAM aims to serve a wide array of markets, including automotive, client PCs and networking systems built for 5G and AI Application. So not only that the JEDEC LPDDR5 specification has seriously increased in its complexity to meet higher bandw...
- 18 May 2021
Breakfast Bytes: Vietnamese Orphanages and Smartphone Apps

Paul McLellan

Kids in orphanages have a hard life. You only have to read Oliver Twist to get some idea of that. Or watch the recent hit Netflix drama Queen's Gambit. The best way to secure a future is to get to university. It sure beats becoming a pickpoc...
- 18 May 2021
Analog/Custom Design: Virtuoso Meets Maxwell: Making the Ports Ready for Simulations in Clarity 3D Solver

Amir Asif

This blog describes the features in Virtuoso Layout EXL and Clarity 3D Solver that are helpful in making the ports ready for an electromagnetic simulation.
- 17 May 2021
カスタムIC／ミックスシグナル: Start Your Engines: 非常に効率的なミックスシグナル検証エンジニアの7つの習慣

Custom IC Japan

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。ミックスシグ...
- 17 May 2021
Academic Network: UCLA Leverages High-level Synthesis to Make Rapid Architecture Trade-offs

Kira Jones

The Cadence Academic Network values our deep relationships and collaborations with universities. We’re always looking for ways that we can deepen the bond and broaden professor and student knowledge of Cadence tools. Sruba Seshadri, Senior Acco...
- 17 May 2021
Computational Fluid Dynamics: The Evolution of Computational Aerospace and CFD

John Chawner

In the beginning there was the airfoil. Or more specifically, in 1968 it became clear that something new was needed to help design supercritical airfoils and wings. Today there is serious planning for aircraft certification by simulation and for main...
- 17 May 2021
Computational Fluid Dynamics: Extending Quadcopter Drone Flight Time and Range with OMNIS CFD Simulations

Paul McLellan

Drones have proven to be an efficient solution for a large range of applications within the military, industrial, and private consumer domains. In the past decade, their use has been soaring and their annual growth rate is anticipated to exceed 50%.....
- 17 May 2021
定制IC芯片设计 : Virtuoso Meets Maxwell: 跨平台流程的模式-- 统一库

deeptig

目前，将使用不同工艺的元件集成在一起似乎是一件神奇的事情，但是它允许设计人员使用新的工艺，在衬底上将验证过的旧节点设计组合在一起，从而降低了同质片上系统(SOC)集成的成本。传统的外包装配测试（OSAT）供应商及IC 供应商都绞尽脑汁为用户提供最佳集成方法，例如扇出式晶圆级（Fan-Out Wafer-Level）封装技术，它可用于构建更小更高效的系统。
- 17 May 2021
Breakfast Bytes: Update: CadenceLIVE India, Ransomware, 2nm, and More

Paul McLellan

This is another one of my update posts, following up on topics I covered in earlier Breakfast Bytes posts but where the new material is not enough to justify an entire new post by itself CadenceLIVE India CadenceLIVE India, originally scheduled for ...
- 17 May 2021
Breakfast Bytes: Sunday Brunch Video for 16th May 2021

Paul McLellan

https://youtu.be/_wup2MSTVks Made on Communication Hill, San Jose (camera Carey Guo) Monday: Intel eASIC: Linley and DARPA Tuesday: Please Excuse the Mesh: CFD and Pointwise Wednesday: Linley: Driving AI from the Cloud to the Edge Thursday: ESD ...
- 16 May 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

Another Friday, another week chock full of CFD, CAE, and CAD news. This week features a topic near and dear to my heart involving death of the rainbow color map for displaying simulation results. There are a couple of good "list" articles o...
- 14 May 2021
Breakfast Bytes: The Latest MLPerf Results for Inference

Paul McLellan

Just before the recent Linley Spring Processor Conference 2021, MLPerf released its latest round of benchmark results (just for inference). Until now, MLPerf benchmarks have not taken power efficiency into account. Even in the data center, where...
- 14 May 2021
PCB設計／ICパッケージ設計: ASCENT: Ready-GOで設計スタート！ライブラリの用意がなくても大丈夫

SPB Japan

Allegro® System Captureの概要はお伝えしたので、今回は設計プロセスの一番最初の部分からお話を始めましょう。さて、部品はどこにありますか？Allegro System Captureでの論理デザインを作成するときに使用できる部品はどれですか？お分かりの通り、部品は論理設計における基本的な構成要素であり、設計者は安定した部品のコレクションまたはライブラリを使用することになっています。設計者として、あなたはシンボルやフットプリントなど、利用可能な部品それぞれについてほぼ...
- 13 May 2021
カスタムIC／ミックスシグナル: Spectre Tech Tips: 電熱シミュレーションの紹介

Custom IC Japan

集積回路の熱性能を理解することは、回路の誤動作の原因となる過熱を回避するために不可欠でした。集積度が高まるにつれ、オンチップの温度を制限するために、集積回路の消費電力がますます重要になっています。Spectreは、IC設計の熱解析を提供し、IC設計者が熱を考慮した設計を管理し、製品の熱特性を向上させるのを支援します。例えば、下図のチップデザインでは、温度を監視するためにチップ上に熱センサーを配置しています。しかし、実際のホットスポットは、センサーから少し離れたところにあります。ホットスポットと...
- 13 May 2021
RF Engineering: μWaveRiders: Scripting in the Cadence AWR Design Environment

TeamAWR

What are the advantages of using Python over VBA for scripting in the Cadence AWR Design Environment platform? The VBA implementation in the platform has a number of limitations. Python allows access to a large body of open-source libraries for higher-level mathematics, statistics, and digital signal processing. Python is very efficient in array processing, and libraries can be accessed for further array processing capability…
- 13 May 2021
RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environmentでのスクリプティング

RF Design Japan

　Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。このシリーズの新しいブログに関する通知を受け取るために、Subscribe Nowをクリックし、Su...
- 13 May 2021
Breakfast Bytes: ESD Alliance CEO Outlook

Paul McLellan

Next Tuesday afternoon, May 18, at 2:00pm PDT is the annual CEO Outlook meeting. It will be virtual, of course. But as a result, it seems to have a lot more CEOs than can easily fit onto a small stage. Ed Sperling will moderate. The CEOs are: Arm&md...
- 13 May 2021
Analog/Custom Design: Virtuoso ICADVM20.1 ISR18 and IC6.1.8 ISR18 Now Available

Virtuoso Release Team

The ICADVM20.1 ISR18 and IC6.1.8 ISR18 production releases are now available for download.
- 12 May 2021
Verification: Introduction to Macros – Answers to Your Questions

teamspecman

Thanks to all the people who attended the webinar Extend the Language! An Introduction to Specman Macros that we had on March the 17^th. If you did not attend, or attended and want to see it again – you can view Extend the Language Using Specman e Macros! Webinar Recording (Video). The video contains English captions.

Many questions were asked during the session, and under limitation of time – not all of them were…
- 12 May 2021
System, PCB, & Package Design : BoardSurfers: Training Insights: Creating Footprints in Allegro PCB Editor

Niharika1

A footprint is a graphical representation composed of pads used for connecting electronic devices to a PCB. Any error while creating a footprint can cause redesigning of the whole board. Therefore, creating the right footprint is important to the des...
- 12 May 2021
Digital Design: Do You Know DFT Violations Can Be Debugged Using Genus GUI? Excited to Explore?

Neha Joshi

Design for Test (DFT) techniques provide measures to comprehensively test the manufactured device for quality and coverage. During the synthesis stage, you might encounter DFT violations that need to be resolved.

We know it is a complicated process to debug the DFT violations. But don’t worry!! We can help you to sail through this.

Check the DFT Analyzer capability, which helps in graphical debugging of DFT violations…
- 12 May 2021
Breakfast Bytes: Linley: Driving AI from the Cloud to the Edge

Paul McLellan

In the machine learning space, two significant things happened recently. The first was the recent Linley Spring Processor Conference 2021. The focus of the conference was processors for machine learning. Linley Gwenapp's keynote was titled D...
- 12 May 2021
Academic Network: Girls' Day, EDA and Minecraft

Anton Klotz

Cadence is always continuing to build our diverse and inclusive culture, especially by adding more women engineers to our teams. Several programs are dedicated to encouraging women in STEM like, the Cadence Women in Technology Scholarship program, sp...
- 11 May 2021
Breakfast Bytes: Please Excuse the Mesh: CFD and Pointwise

Paul McLellan

You probably know that Cadence acquired fluid dynamics meshing company Pointwise recently. I covered it briefly in my post Update: Pointwise, PCIe, RISC-V. I wanted to find out more, so I had a call with Pointwise CEO (or CEO Emeritus) John Chawner i...
- 11 May 2021
Breakfast Bytes: Intel eASIC: Linley and DARPA

Paul McLellan

At the recent Linley Processor Conference 2021I, Intel's Massimo Verita talked about Intel's eASIC N5X. He was asked during the questions whether this used Intel's EMIB packaging technology that provides buried connections inside the pack...
- 10 May 2021

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