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Latest Blog Posts

  • Digital Design: Voltus Voice: Demystifying ESD—Charting Your Way through Voltus ESD Reports

    Vijetha
    Vijetha
    In the concluding blog of our "Demystifying ESD" series, we walk you through the features of the Voltus Electrostatic Discharge (ESD) analysis reports that provide a clear insight on your design's vulnerability to ESD, from the early-design phase to tapeout.
    • 28 May 2021
  • Digital Design: SSV 21.1 Base Release Now Available

    SSV Release Team
    SSV Release Team
    The Silicon Signoff and Verification (SSV) 21.1 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 21.1 release, see the README.txt file in the installation hierarchy. SSV211 Here is a ...
    • 28 May 2021
  • Breakfast Bytes: Offtopic: "Pole Pole" to the Top of Kilimanjaro

    Paul McLellan
    Paul McLellan
    Today is the last blogging day before Memorial Day on Monday, so as is now traditional, I go off-topic. Today, high points of my life. As in high points in the world that I have been to. The highest point in the UK is Ben Nevis in Scotland, at 4,413&...
    • 28 May 2021
  • Computational Fluid Dynamics: Fluid Dynamics Investigation of the Sonic Boom on a Supersonic Aircraft

    AnneMarie CFD
    AnneMarie CFD
    The return to supersonic flight is amongst the hottest topics in aviation today, as several companies (Boom Supersonic and Aerion, among others) are actively developing new supersonic commercial airliners targeted to enter in service in the comi...
    • 27 May 2021
  • Breakfast Bytes: Why Attend CadenceLIVE Americas 2021 on June 8 and 9?

    Paul McLellan
    Paul McLellan
    Once again this year, CadenceLIVE Americas is coming up soon and it will be completely virtual. As I do each year, let me give you some good reasons to attend. We'd love to give you food and drink but you know why that is not going to happen. We stil...
    • 27 May 2021
  • Analog/Custom Design: Virtuosity: Learn the Right Steps—Design 5G Your Way with Cadence Training

    Parula
    Parula
    In this blog we would like to let you know – amongst other things - how to implement a transceiver RFIC module of a 5G mmWave mobile handset working at 28GHz. We are also happy to announce and introduce our brand new corresponding training on June 14th 2021.
    • 27 May 2021
  • 定制IC芯片设计 : Virtuoso Video Diary: “Training Bytes” 助推知识传播—第5部分

    Parula
    Parula
    2021年Knowledge Booster 系列博客,我们将介绍如何修改相关参数来解决Spectre Simulation DC的收敛问题和报错问题。
    • 27 May 2021
  • Analog/Custom Design: Spectre Tech Tips: Introducing Spectre Analog Fault Analysis

    Jianhe Guo
    Jianhe Guo
    Chip tests have become more demanding as defects tend to occur more often in scaled down processes. In this blog, we'll discuss how you can use the Spectre Fault Analysis to improve test coverage by identifying critical test patterns.
    • 26 May 2021
  • Breakfast Bytes: Bringing Clarity to the Cloud

    Paul McLellan
    Paul McLellan
    Cadence announced Clarity 3D Solver Cloud as part of Cadence Hybrid Cloud, providing cloud-based system analysis as the click of a button.
    • 26 May 2021
  • System, PCB, & Package Design : IC Packagers: Analyzing and Fixing Wire Bond-Specific Design Issues

    avijeet
    avijeet
    Design reuse is the key to faster design cycles in today’s packaging design industry, where the shortest possible time to market makes or breaks the success of a product. As most of the package designs have wire bonding, sharing the wire bondin...
    • 26 May 2021
  • Tutorial Tuesday - It's Time to Learn Some Meshing

    Computational Fluid Dynamics: Tutorial Tuesday - It's Time to Learn Some Meshing

    John Chawner
    John Chawner
    Today's not just Tuesday, it's Tutorial Tuesday. What's that, you ask? Each Tuesday for what seems like forever, we've been publishing a new video on Pointwise's YouTube channel. And these aren't just any videos. They help you...
    • 25 May 2021
  • Breakfast Bytes: Rapid Adoption Kits for Arm's Premium Mobile Platforms

    Paul McLellan
    Paul McLellan
    Today, Arm announced its new lineup of processors for mobile. These are the first Arm v9 instruction set (ISA) CPUs, new Mali GPUs, and new system interconnect. Cadence announced rapid adoption kits for the premium platform, which consists of th...
    • 25 May 2021
  • System, PCB, & Package Design : BoardSurfers: Managing Minor Spacing DRCs Using Manufacturing Tolerances

    Boopathy J
    Boopathy J
    While translating boards from different PCB design applications or changing design units in the later phase of a design cycle, a wide variety of mathematical round-offs may occur for geometric computations. As DRCs are logically computed, the DRCs cr...
    • 25 May 2021
  • SoC and IP: Introducing Cadence IP for PCIe 6.0

    tonychen6636
    tonychen6636

    Since its inception, PCI Express® (PCIe®) has proliferated quickly to become ubiquitous in the modern digital world. Today, PCIe is an indispensable technology found in high-performance computing, AI/ML accelerators, network adapters, and solid-state storage, to name a few. In addition, recent advances in speed and latency of PCIe have allowed it to gain wider adoption within the memory hierarchy as well (e.g., persistent…

    • 24 May 2021
  • Breakfast Bytes: PCIe 5.0 and 112G-LR IP in TSMC N5

    Paul McLellan
    Paul McLellan
    Well, that's a lot of tech gobbledegook in the title of this post. Here's what it means. This morning Cadence announced that its IP interfaces for low-power PCI Express (PCIe) 5.0 and for 112G long reach (112G-LR) are available on TSMC's ...
    • 24 May 2021
  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    This week’s CFD news includes both an image of the week and an application of the week – draw your own conclusions. We’re still seeing a lot of online events but I am happy that AIAA SciTech 2022 looks to be an online and in-person ...
    • 21 May 2021
  • Breakfast Bytes: Linley: Habana and Cerebras

    Paul McLellan
    Paul McLellan
    In the recent Linley Spring Processor Conference, there were many processors for various kinds of AI, deep learning, and inference. As I said in my overview post Linley: Driving AI from the Cloud to the Edge, I don't think that all these products...
    • 21 May 2021
  • カスタムIC/ミックスシグナル: Spectre FX: FはFastのF、本当に高速

    Custom IC Japan
    Custom IC Japan
    本日5月20日(米国時間)、ケイデンスは、最大で3倍の速度(同等以上の精度で)を持つ次世代FastSPICE回路シミュレータSpectre FX Simulatorを発表しました。このシミュレータは、メモリを含む複雑なアナログおよびカスタムデジタルブロックとサブシステムの大規模なシミュレーション検証の課題を解決します。 Spectre FXについて聞いたとき、まず「待てよ、私は20年前にCustom ICを担当していた時にFastSPICE製品があったはずだが」と思いました。Spectre F...
    • 20 May 2021
  • Spotlight Taiwan: 增強系統分析與PCB設計研發戰力 - 隨選影片 向您致敬!

    candyyu
    candyyu
    PCB設計暨系統分析 -  強檔精彩影片回顧! 5G、AI、工業物聯網(IIoT)、自駕車和超大規模(hyperscale)運算等技術的匯聚,為半導體產業帶來了新商機,但同時也推升了系統設計的複雜度。隨著異質整合技術的快速進展,現在,我們正處於電子設計演進的轉捩點,需要突破傳統的新思維與做法。因此,為了滿足電子設計朝更高整合度和多樣化垂直應用發展的趨勢,業界需採用「超越晶片」的全流程設計,才能夠快速、準確、全面性地克服日益嚴苛的系統級分析與設計挑戰。Cadence已建構了全流程解決方案...
    • 20 May 2021
  • Breakfast Bytes: Spectre FX: F Is for Fast, Really Fast

    Paul McLellan
    Paul McLellan
    Today, Cadence announced the Spectre FX Simulator, a next-generation FastSPICE circuit simulator with up to 3X the performance of anything else in the market (at the same accuracy or better). It solves large-scale verification simulation ch...
    • 20 May 2021
  • Moore’s Law Is Still Accelerating

    Life at Cadence: Moore’s Law Is Still Accelerating

    Chin-Chi Teng
    Chin-Chi Teng
    Moore’s Law Is Still Accelerating. I’m looking at Moore’s Law differently, measuring the pace of new node arrivals. Cadence is at the forefront of the transition to 3nm, actively working with early adopter customers
    • 19 May 2021
  • Breakfast Bytes: RSAC: Opening Keynote and a Whitrospective

    Paul McLellan
    Paul McLellan
    The RSA Conference on cybersecurity took place in the middle of May. This year, the 30th RSAC, the theme was Resilience. It is a good choice since the start of 2021 has been terrible for security with both the SolarWinds supply chain attack, and the ...
    • 19 May 2021
  • 中文技术专区: 视频演示:PCIe 5.0设计究竟应该怎么做

    FormerMember
    FormerMember
    原文链接:https://community.cadence.com/cadence_blogs_8/b/ip/posts/taking-the-wraps-off-cadence-pcie-5-0-ip-sub-system 回望过去,Cadence 是首家PCI Express (PCIe) 3.0控制器的IP供应商,并向市场推出了业界最低功耗的PCIE 3.0 PHY。立足现在,我们自豪的延续了这一传统,PCIe 5.0系统解决方案的推出将功耗、性能和面积推向了新的高度。 图1:每三年增...
    • 19 May 2021
  • Spotlight Taiwan: 淺談運算流體力學(CFD)與Pointwise公司

    candyyu
    candyyu
    原文出處: Please Excuse the Mesh: CFD and Pointwise 作者: Paul McLellanCadence於今年四月收購了流體動力學公司Pointwise。在我的前一篇文章探討Pointwise、PCIe、RISC-V中有簡短地提到。為了深入瞭解Pointwise,我聯繫了人在德州沃斯堡 (達拉斯人) 的Pointwise執行長 (或稱榮譽執行長) John Chawner。 網格建置(Meshing) 首先,Pointwise做運算流體力學 (簡稱CFD...
    • 18 May 2021
  • System, PCB, & Package Design : ASCENT: Analyzing Electrical Stress, Aging, and Faults of PCB Components

    Auromala
    Auromala
    Component heating, Joule heating, heat sinks…does the very idea of checking the stress of hundreds of devices on a board for various operating conditions make you reach for a cup of coffee? Is a ¼ Watt resistor dissipating 1/3 Watts? D...
    • 18 May 2021
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