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Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Corporate News

Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology

Delivering the next wave of chiplet innovation, Cadence has successfully taped out…

Corporate
• 2 min read
news story , ucie , featured , chiplets , TSMC N3P

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured
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Blog - Post List
Latest blogs

Breakfast Bytes

RSA: Bruce Schneier

I have been following Bruce Schneier for a long time. He literally wrote the book…

• 5 min read
security , public interest technology , rsa , schneier

Academic Network

Best Paper Award at LATS2019 for Zhan Gao

The IEEE Latin-American Test Symposium (LATS) is an annual forum attended by professionals…

• 2 min read
Cadence Academic Network , academia , CDNLive EMEA , modus , imec

System, PCB, & Package Design 

BoardSurfers: Validating Your Shapes

Your design is near completion. Except that you’ve got an area of your plane shape…

• 5 min read
PCB Editor , PCB design and layout , Shape Checks , Allegro

Breakfast Bytes

Geoff Hinton, Yann LeCun, and Yoshua Bengio Win 2019 Turing Award

This year's Alan Turing Award goes to Geoff Hinton, Yann LeCun, and Yoshua Bengio…

• 4 min read
deep learning , turing award , neural networks , AI

Whiteboard Wednesdays

Whiteboard Wednesdays - When it Comes to Cloud-Based Design, One Size does Not Fit…

In this week's Whiteboard Wednesdays video, Tom Hackett describes how different types…

• less than a min read
Whiteboard Wednesdays , Cloud-based Design , cadence cloud

Breakfast Bytes

Bringing Clarity to System Analysis

Today, at CDNLive Silicon Valley, Lip-Bu Tan, Cadence's CEO, announced the Clarity…

• 4 min read
system analysis , 3d field solver , cloud , cadence cloud , Sigrity , clarity

Verification

Cadence Announces Continued Partnership With Northrop Grumman

On March 28th, 2019, Cadence Design Systems announced an expanded collaboration with…

• 1 min read
chip design , Functional Verification , press release , Northrop Grumman

Verification

Cadence Leads the Pack: The First VIP for USB4 is Here!

On March 14th, Cadence announced the release of the industry’s first USB4-supporting…

• 1 min read
Functional Verification , VIP , usb4 , press release

Breakfast Bytes

CloudBurst: The Best of Both Worlds

I think if you were starting a new semiconductor company, you would go straight for…

• 3 min read
cloud , cloudburst , cadence cloud

Breakfast Bytes

Sunday Brunch Video for 31st March 2019

https://youtu.be/2_zmjd8wM0c Made on my balcony (camera Carey Guo) Monday: AI Index…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Cadence专家培训计划正式启动

感谢您对Cadence的关注与支持，我们的微信服务号“Cadence楷登PCB及封装资源中心”已正式上线。我们遵循Cadence所倡导的 “系统设计实现” 策略助力工程师们优化设计…

• less than a min read
Chinese blog , 中文

定制IC芯片设计

Virtuosity: 交互辅助布线命令的快捷键使用指南

摘要： 对于使用快捷键（bindkeys）的好处，相信您在日常工作中已深有体会。 那么，为了帮助用户获得更好的体验，本文介绍了Virtuoso 交互辅助布线相关的常用快捷键…

• less than a min read
Interactive Routing , Chinese blog , Create Wire , ICADVM18.1 , custom/analog , Virtuoso Space-based Router , Create Stranded Wire , Interactive and Assisted Routing , Wire Editing , Mixed-Signal , Virtuoso , Virtuosity , Virtuoso Video Diary , Custom IC Design , Create Bus , Custom IC , IC6.1.8 , Virtuoso Layout Suite XL

Breakfast Bytes

Twenty Years in the Matrix

It is hard to believe, but Sunday will be the 20th anniversary of The Matrix. It…

• 5 min read
simulation hypothesis , the matrix , simulation

System, PCB, & Package Design 

BoardSurfers: Dynamic Shape Voiding – Getting the Most Out of the Tool

Dynamic shapes; whether used on a negative or positive artwork layer, for power,…

• 7 min read
Constraint Manager , PCB design , Allegro PCB Editor

Analog/Custom Design

Spectre Tech Tips: Spectre Assert and Design Check Overview

As an analog/mixed-signal designer, verification engineer, or CAD expert, you use…

• 5 min read
spectre aps , Circuit simulation , asserts , Spectre , SOA Checks , Design Checks

Breakfast Bytes

Scaling EDA in the Cloud

Last year at DAC, we announced Cadence Cloud (for details see my post cleverly titled…

• 4 min read
cloud , causality , cadence cloud , amdahl's law

System, PCB, & Package Design 

Join us at CDNLive Silicon Valley 2019

Cadence will kick off this year’s CDNLive worldwide user conference series starting…

• 1 min read
CDNLive , CDNLive 2019 , CDNLive San Jose

Breakfast Bytes

The Ladybird Book of Quantum Mechanics

I mentioned in passing in a recent post that when I was helping teach first-year…

• 4 min read
core memory , DRAM , ladybird

Whiteboard Wednesdays

Whiteboard Wednesdays - FMCW Radar Receiver Signal Processing Using ConnX B20 DS…

In this week's Whiteboard Wednesdays video, Ramchandra Dabade talks about FMCW radar…

• less than a min read
DSP , Whiteboard Wednesdays , radar signal processing , ConnX
CDNS - Fix Layout Hompage