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Featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP(Verification IP:VIP)を発表しました。今回発表されたVIPは…

Cadence Japan
Cadence Japan 4 Dec 2025 • less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
Cadence Japan 1 Dec 2025 • 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
Corporate 21 Nov 2025 • 1 min read
news story , Verification IP , featured
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Blog - Post List
Latest blogs

Breakfast Bytes

How to Find Primes

Primes are really important in encryption. In fact, the foundation of internet security…

Paul McLellan 14 Nov 2018 • 9 min read
security , prime number , encryption , factorization

Whiteboard Wednesdays

Tensilica HiFi 5 DSP Enabling Machines for Voice UI

In this week’s Whiteboard Wednesday, Sachin Ghanekar, Design Engineering Group director…

References4U 13 Nov 2018 • less than a min read
hifi 5 , Whiteboard Wednesdays , Tensilica , HiFi DSP

Breakfast Bytes

Bagels and Brains: SEMI's Artificial Intelligence Breakfast

A couple of weeks ago the Silicon Valley chapter of SEMI held a breakfast meeting…

Paul McLellan 13 Nov 2018 • 7 min read
Intel , semi , machine learning , aws , Amazon , xilinx , ARM , AI

定制IC芯片设计

Virtuoso: 新序曲-Design Planner 工具简介

新版的Virtuoso平台(*ICADVM18.1)提供了突破性的分析功能和创新的仿真驱动版图设计,实现了更强大,更高效的设计,支持最先进的工艺技术。基于该解决方案…

Rishu Misri Jaggi 13 Nov 2018 • less than a min read
Chinese blog , Cadence blogs , Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Advanced Release , Virtuoso , New in EDA , Custom IC Design , Design Planner , Custom IC , Layout Editing

Breakfast Bytes

Portable Stimulus and Correct Designs

The title of this post seems pretty generic, after all who wouldn't want correct…

Paul McLellan 12 Nov 2018 • 4 min read
correct designs , Perspec , Accellera , pss

Breakfast Bytes

Sunday Brunch Video for 11th November 2018

https://youtu.be/deyk_MEkjZg Made at Cadence Diwali Celebration (camera Sean) Monday…

Paul McLellan 11 Nov 2018 • less than a min read
Automotive , risc-v , China , Kaufman Award , IEDM

PCB、IC封装:设计与仿真分析

针对电气工程师的热管理基础——第一篇

作者:Lawrence Der 在过去,机械工程师全权负责产品的热力设计,包括产品的机械外壳和其它物理方面的设计;然而现在,热力设计问题却是要电气工程师来共同承担…

Sigrity 9 Nov 2018 • less than a min read
热 , Chinese blog , 热分析 , 温度 , 中文 , PowerDC , 传热 , 热基础

Breakfast Bytes

Kaufman Award Dinner: The Tom Williams Story

Wednesday night it was the annual Kaufman Award Dinner to honor this year's recipient…

Paul McLellan 9 Nov 2018 • 6 min read
kaufman dinner , scan , Scan test , IBM , Kaufman Award , tom williams , lssd , synopsys

Breakfast Bytes

RISC-V Summit Preview: Pascal or Linux?

Coming up in December, in the same week as IEDM, is the RISC-V Summit at the Santa…

Paul McLellan 8 Nov 2018 • 3 min read
risc-v , Spectre , instruction set architecture

Breakfast Bytes

IEDM Preview: 3nm and More

A lot of aspects of EDA and semiconductor are fairly easy to predict: you read off…

Paul McLellan 7 Nov 2018 • 5 min read
IBM , 3nm , Samsung , imec , gaa , tu dresden , IEEE , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays - How the Cadence 112G SerDes IP Solves the Challenges of Long…

In this week’s Whiteboard Wednesday, Wendy Wu explains what NRZ and PAM-4 signaling…

References4U 6 Nov 2018 • less than a min read
Whiteboard Wednesdays , 100G Ethernet , 112G SerDes , PAM-4 , SerDes , 400G Ethernet , 800G Ethernet

Breakfast Bytes

Automotive Summit: Driving an Industry with Electronics

Coming up on November 14th is the Cadence Automotive Summit. This will be held on…

Paul McLellan 6 Nov 2018 • 3 min read
Automotive , lidar , radar , Tensilica , vision , ISO 26262 , ADAS , ARM

The India Circuit

A Diwali with Green Crackers and Cooking Bots

It’s Diwali! My favorite festival out of all the many celebrations that we Indians…

Madhavi Rao 5 Nov 2018 • 3 min read
firecrackers , green cracker , air pollution , Diwali

Breakfast Bytes

Breakfast Buffet for October 2018

https://youtu.be/YBlBzB3n504 The three highlighted posts for October were: CDNLive…

Paul McLellan 5 Nov 2018 • less than a min read
hifi 5 , breakfast buffet , 112G SerDes , cdnlive israel

Breakfast Bytes

China Update

Over the last couple of weeks, I came across various little things about China, none…

Paul McLellan 5 Nov 2018 • 6 min read
China , Micron , semi , DRAM , ic insights , bloomberg

Breakfast Bytes

Sunday Brunch Video for 4th November 2018

https://youtu.be/HCJG-tABZWE Made at Linley Fall Processor Conference (camera Sean…

Paul McLellan 4 Nov 2018 • less than a min read
Automotive , hifi 5 , curvycore , formal , openroad , Tensilica , photonics , Texas Instruments , JasperGold , darpa

PCB、IC封装:设计与仿真分析

升级到Allegro17.2-2016的10大理由之10:易于使用的改进

我所认识的大多数PCB设计工程师跟我有同样的习惯… 我们有最喜欢的颜色、板层名称、定制的键盘,我们最大的目标是看到一天之内完成了多少条网络布线。我们很少有改变这些使用习惯…

TeamAllegro 2 Nov 2018 • 1 min read
PCB , Chinese blog , Allegro 17.2 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , Allegro

Breakfast Bytes

ERI: OpenROAD

If I had to summarize DARPA's Electronic Resurgence Initiative in one phrase, it…

Paul McLellan 2 Nov 2018 • 6 min read
openroad , kahng , open source , eri , darpa

Breakfast Bytes

Yoga is Passé, the Future Is CurvyCore

Despite CurvyCore sounding like something that you might take classes in at your…

Paul McLellan 1 Nov 2018 • 5 min read
curvycore , conformal routing , Virtuoso , photonics
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