Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

TSMC OIP Virtual Design Environment

Today, it is TSMC's 2018 Open Innovation Platform (OIP) Ecosystem Forum in the Santa…

• 5 min read
OIP , tsmc oip vde , 7nm+ , TSMC , InFO , microsoft azure , aws , cadence cloud , 5nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Significance of Sparsity in Neural Networks

In this week’s Whiteboard Wednesdays video, Megha Daga discusses how handling sparsity…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks , neural networks , CNN

Breakfast Bytes

EDPS: Experience Teaching Undergraduates EDA

At the recent EDPS, Cadence's Patrick Groeneveld presented about a course that he…

• 4 min read
Stanford , EDA , EDPS , machine learning , ee292a

Breakfast Bytes

GlobalFoundries Executive Team Explains the Pivot

At the recent GlobalFoundries Technology Conference GTC there was a press and analyst…

• 8 min read
GTC , fdx , GlobalFoundries

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之6：平滑的弧形走线节省了柔板设计的走线设计时间

平滑的弧形走线是Cadence®Allegro®PCB Designer 17.2-2016的新功能，通过更有效的方法为用户提升设计效率。这一新功能在弧形走线的基础之上又得到了很大的提升…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , 布线 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , 刚柔结合

Spotlight Taiwan

Taiwan Industry Celebrates IC 60th Anniversary

In 1958, Jack Kilby of Texas Instruments invented the integrated circuit, a historical…

• 1 min read
MOST , Taiwan , semi taiwan , semi , Lip-Bu Tan

Breakfast Bytes

Figure-Skating Champion Wins Kaufman Award

I never went to journalism school, but people get taught to open biographical articles…

• 7 min read
IBM , Kaufman Award , tom williams , synopsys , esd alliance

The India Circuit

CDNLive India 2018...err...Recorded, Not Live

Better late than never! If you missed CDNLive India 2018 which took place on Sep…

• less than a min read
CDNLive India , CDNLive

Breakfast Bytes

What's For Breakfast? Video Preview October1st to 5th 2018

https://youtu.be/dRLFFPgTjRM Coming from Times Square NY (camera Carey Guo) Monday…

• less than a min read
OIP , gobalfoundries , GTC , Wally Rhines , TSMC , EDPS , PCB West

System, PCB, & Package Design 

Winning With Fewer PCBs

By John Burkhert Jr The business world keeps score with dollars and cents. The…

• 5 min read
PCB , PCB system design , Allegro PCB DesignTrue DFM Technology , multiboard , PCB design , DFM

Breakfast Bytes

GTC: GlobalFoundries Pivots

Tuesday was the GlobalFoundries Technology Conference GTC. GF announced earlier in…

• 6 min read
GTC , fdx , GlobalFoundries

Breakfast Bytes

RF Design with Cadence Virtuoso and National Instrument's AXIEM

When cell-phones first became a consumer product, a VP of Nokia drew me an upside…

• 4 min read
RF , National Instruments , radio , Breakfast Bytes

The India Circuit

Never Lose Your Way Again With These Nifty Maps

CDNLive India took place a few weeks ago and we are just trying to catch our breath…

• 4 min read
artificial intelligence , CDNLive India , Netradyne , CDNLive , Edge Computing , HD mapping , machine learning , AI

Analog/Custom Design

Virtuoso - The Next Overture: Introducing Simulation Driven Routing

The new release of the Virtuoso platform (ICADVM18.1) offers groundbreaking analysis…

• 2 min read
Interactive Routing , EAD , Virtuoso Next , Virtuoso Overture , Virtuoso New Design Platform , electrically aware design , Simulation-driven interactive routing , Mixed-Signal , Layout , Virtuoso , Custom IC Design , Custom IC

Breakfast Bytes

CDNLive India: Invecas and FD-SOI

Today it is GTC, the GlobalFoundries Technology Conference. I will be there and I…

• 5 min read
foundation IP , 22fdx , Innovus , Invecas , GlobalFoundries , FD-SOI

Breakfast Bytes

EDPS: Design Process in Milpitas

For the second year, the Electronic Design Process Symposium (EDPS) took place in…

• 8 min read
eda education , deep learning , EDPS

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之5：如何进行“叠层设计”？

在这我们谈论的不是您的叠层设计跟其他人比怎么样，而是您设计的PCB层叠结构，是刚性板、柔性板、刚柔板，或者使用了镶嵌技术。层叠的定义，更具体而准确的层叠的定义，是至关重要的…

• less than a min read
PCB , Chinese blog , 布线 , PCB设计 , 中文 , MCAD-ECAD , Allegro PCB Editor , Allegro PCB编辑器 , 刚柔结合设计 , Allegro升级17.2 , 刚柔结合 , Allegro

Breakfast Bytes

Jaswinder's Only Job Interview

On Labor day, I didn't get the day off since I was in Delhi. I had to labor, not…

• 6 min read
bengaluru , Cadence India , Noida

Breakfast Bytes

What's For Breakfast? Video Preview September 24th to 28th 2018

https://youtu.be/NYsYkQzZADo Coming from SAP Center, San Jose (camera Sean) Monday…

• less than a min read
National Instruments , GTC , Kaufman Award , EDPS , RF design , Invecas , GlobalFoundries , esd alliance
CDNS - Fix Layout Hompage