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Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
Corporate 8 Oct 2025 • 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
Corporate 2 Oct 2025 • 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
cdns - all_blogs_categories

  • All 6084
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  • Artificial Intelligence 23
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  • Computational Fluid Dynamics 362
  • Data Center 40
  • Digital Design 428
  • Learning and Support 55
  • RF Engineering 114
  • SoC and IP 415
  • System, PCB, & Package Design  986
  • Verification 1286
  • Cadence Japan 4

  • CFD(数値流体力学) 45
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  • カスタムIC/ミックスシグナル 188
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
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  • 定制IC芯片设计 79
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Blog - Post List

Latest blogs

PCB、IC封装:设计与仿真分析

Omnis Marine 如何通过优化船舶纵倾,节省高达 5%的燃料?

本文作者:Maurits Van Den Boogaard, Cadence CFD Product Engineer space 在谈到航运业节能减排时,大家可能不会想到从纵倾优化的角度入手…

SDA China 20 Jun 2022 • less than a min read

PCB、IC封装:设计与仿真分析

2022 PCB网课 | Allegro PCB进阶设计系列课程

成为资深PCB工程师必备的能力,是面对复杂设计时,从容地做好前期规划(规则框架、布局规划、布线规划),并凭借对于工具的熟悉度,有效落实这些规划。如此,才能在追求PCB板体积更小…

TeamAllegro 16 Jun 2022 • less than a min read
Chinese blog , allegro 17.4 , 系统设计 , PCB设计 , 中文 , 直播网课 , online training , Allegro PCB Designer , Allegro

Breakfast Bytes

Offtopic: The Mini

Today is the last day before a break so I'm going off topic as usual. Tomorrow is…

Paul McLellan 16 Jun 2022 • 4 min read
Automotive , offtopic

カスタムIC/ミックスシグナル

Spectre Tech Tips: Spectre Xシミュレーションのパフォーマンスを向上させる方法

シミュレーションのパフォーマンスは、チップの設計、検証、およびサインオフに必要な時間の重要な要素の一つです。シミュレーションが効率的であるほど、テープアウトに必要なリソースと所要時間は少なくなります…

Custom IC Japan 15 Jun 2022 • less than a min read
performance , ADE Explorer , performance diagnosis , Virtuoso Analog Design Environment , Spectre , Verifier Run Plan , japanese blog , spectre x , Spectre X Simulator , ADE Assembler , verification

Breakfast Bytes

HOT CHIPS 34 Preview

Every Summer, one of the most interesting conferences I attend is HOT CHIPS. Often…

Paul McLellan 15 Jun 2022 • 5 min read
CXL , hotchips , circt , mlir

PCB、IC封装:设计与仿真分析

汽车行业新标准:ISO 21434

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章“ Have You Heard of ISO 21434…

SDA China 14 Jun 2022 • less than a min read
Chinese blog , iso 21434 , 中文 , 汽车 , 汽车网络安全 , 合规 , 安全

Breakfast Bytes

CadenceLIVE Silicon Valley 2022

CadenceLIVE Silicon Valley took place last week. It turned out to be the second in…

Paul McLellan 14 Jun 2022 • 3 min read
cadencelive silicon valley , cadencelive

Verification

Quest for Bugs – The Constrained-Random Predicament

Optimize Regression Suite, Accelerate Coverage Closure, and Increase hit count of…

Anika Sunda 14 Jun 2022 • 2 min read
compression , throughput , machine learning , Hard to Hit Bin , Coverage Closure , Regression , simulation

Breakfast Bytes

RSAC 2022: The Cryptographer's Panel

The biggest security conference in the world is RSAC, held in San Francisco. It fills…

Paul McLellan 13 Jun 2022 • 9 min read
rsac 2022 , rsac , cryptographers' panel

Computational Fluid Dynamics

Insights on Automotive Industry with Kumar

Get insights into the changes happening in the automotive industry and the role of…

Veena Parthan 12 Jun 2022 • 5 min read
Automotive , thermal management , electric vehicles , Multidisciplinary , CFD Applications , engineering , simulation software , automobile

Breakfast Bytes

Optimal Design of High-Speed Flexible Interconnectors Using Deep Learning

At the recent DesignCon 2022, Kyle Chen of Microsoft and Suomin Cui of Cadence jointly…

Paul McLellan 10 Jun 2022 • 4 min read
microsoft , bayesian optimization , designcon 2022 , clarity

Breakfast Bytes

Optimality Intelligent System Explorer

As a kid, I remember reading something that passed for a joke: We are leaving the…

Paul McLellan 9 Jun 2022 • 3 min read
optimality , deep learning , Signal Integrity , AI , clarity

Analog/Custom Design

Virtuosity: Reliability Analysis Report-Reliable Results Made Interactive

Read through this blog to know more about the new Reliability Report view in Virtuoso…

Udit Rajput 9 Jun 2022 • 5 min read
SQLite , Stress Analysis , Analog Design Environment , ADE Explorer , Reliability Report , Virtuoso Analog Design Environment , Virtuoso , Spectre , Virtuosity , ISR21 , Virtuoso Video Diary , ICADVM20.1 , SQLite Operator , aging , ISR26 , reliability analysis , custom reliability data filter , Custom IC , IC6.1.8 , ADE Assembler

Breakfast Bytes

Cadence OnCloud SaaS and e-Commerce Platform, the Next Step of Cadence's Cloud J…

Today at CadenceLIVE Silicon Valley, Anirudh Devgan, Cadence's CEO, announced the…

Paul McLellan 8 Jun 2022 • 4 min read
annapurna labs , cloud , oncloud , aws , cadence cloud

PCB設計/ICパッケージ設計

ASCENT: 進化するライブラリに合わせてデザインを管理する

パーツは PCB デザインの基本的な要素です。デザインに含まれるパーツとそのグラフィック、電気的特性、パーツ定義情報を、アップデートされていく最新ライブラリの内容に合わせることは大変重要です…

SPB Japan 8 Jun 2022 • less than a min read
17.4 , 17.4-2019 , Allegro System Capture , japanese blog , ASCENT , Allegro

System, PCB, & Package Design 

BoardSurfers: Training Insights: Speed Up the Design Process in Allegro PCB Editor…

You can customize your Allegro® PCB Editor design environment to work around repetitive…

Dhruv Prakash 8 Jun 2022 • 5 min read
17.4 , Shortcut Keys , BoardSurfers , Training Insights , Allegro PCB Editor , Allegro

System, PCB, & Package Design 

Conquer SI/PI Challenges and Reduce Time to Signoff for PCIe 6.0

The peripheral component interconnect express (PCIe) high-speed interface has become…

Sherry Hess 7 Jun 2022 • less than a min read
Sigrity X , Power Integrity , in-design analysis , PCIe , Signal Integrity , system-level optimization

System, PCB, & Package Design 

Elevating Analysis and Optimization Across Disciplines to New Productivity Levels…

During the launch preparation of our latest set of AI/ML-enabled offerings, I heard…

fschirrmeister 7 Jun 2022 • 4 min read
Low Power , VCC , machine learning , Artificial Intelligence , Electromagnetic analysis , Signal Integrity , Alberto Sangiovanni-Vincentelli , electromagnetic , Felix , MDAO , AI/ML , thermal

Verification

Modeling Configuration in PSS (Portable Stimulus)

Design patterns for modeling configuration and reconfiguration in PSS (Portable Stimulus…

Efrat 7 Jun 2022 • 4 min read
configuration , Perspec , portable stimulus , verification
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