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Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
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Blog - Post List

Latest blogs

Verification

Tech Tip: Managing Specman esv File Size

When compiling e files on top of Specman, or when using the save command, Specman…

• less than a min read
Specman , e , Incisive Enterprise Simulator (IES) , IES

Verification

Ride The Economy Slow-Down

Last week, at Cadence Sales Kickoff, we have heard fascinating presentations from…

• less than a min read
System Design and Verification , IP re-use , ASIC/ASSP

Verification

New AEware: Generate vr_ad Definitions for IP-XACT XML IP Blocks

[Please welcome guest blogger Steve Hobbs, an Application Engineer in our Field…

• 5 min read
Specman , IP-XACT , vr_ad , Register Package , e , Spirit

Verification

VIP Following OVM Frees Users to Choose SystemVerilog and e

Back in November Cadence introduced a vastly expanded verification IP portfolio using…

• 1 min read
SystemVerilog , OVM , VIP , e , multi-language , eRM

Verification

Welcome to the "Exploring the Virtual Platform" Series

Today I'm starting a series of articles related to what is commonly called the Virtual…

• 5 min read
virtual platform , System Design and Verification , virtual protoype

Verification

Aart DeGeus' Surprise Comment at Last Night's EDAC CEO Forum

Last night the Electronic Design Automation Consortium ("EDAC", the trade group for…

• 2 min read
IEEE 1647 , events , Functional Verification , e , EDAC

Verification

Generation Debugging With "IntelliGen" (With Video)

You might have seen the Generation Debugger of Specman's new Generation Engine IntelliGen…

• 3 min read
IntelliGen , Specman , e , Incisive Enterprise Simulator (IES) , IES

RF Engineering

MMSIM 7.1 Enhancements Benefit RF Designers!

The 7.1 release of MMSIM is scheduled for mid-January. There are many exciting RF…

• 2 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design

System, PCB, & Package Design 

What's Good About Differential Pair Support in Allegro PCB Editor? More Features…

Some very helpful new features for Differential Pair support are available in in…

• 3 min read
SPB 16.2 , PCB design , Differential Pair Support , Allegro

Digital Design

Cool Way to Add Vias!

I knew this functionality existed, but I hadn't really put it to use until yesterday…

• 1 min read
SoC-Encounter , via , Digital Implementation , Add Via

Verification

Predictions for 2009

Having summarized the main verification technology-specific observations that the…

• 3 min read
Specman , HW/SW , verification strategy , metric driven verification (MDV) , Functional Verification , OSCI , Multi-domain verification: HW/SW co-verification , ISX (Incisive Software Extensions) , SystemC , ISX , System Verification , Incisive Enterprise Simulator (IES) , IES

Verification

Functional Coverage for Embedded Software

Hardware verification has evolved into keeping track of a pile of different types…

• 3 min read
FoCus , IBM , System Design and Verification , Specmen , DV club

RF Engineering

Tip of the Week: Guidelines for getting accurate HB QPSS/QPNoise results

Two of the most important parameters for accuracy are: (1) maxharms (2) oversample…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design , Circuit Design

Verification

The New Generation Testcase Utility

Specman's new Generation Engine, "IntelliGen", adopts an entirely new generation…

• 4 min read
IntelliGen , Specman , Functional Verification , Testbench simulation , e , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

RF Engineering

How to Simulate a Subcircuit (Netlist) With Spectre in ADE

Many users ask, "How do I instantiate a netlist into my schematic and simulate with…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , Circuit Design

System, PCB, & Package Design 

What's Good About The SPB16.2 PCB SI Release? Full Wave Field Solver!

The SPB16.2 PCB SI release now contains the Electromagnetic Solution 2D Full Wave…

• 6 min read
PCB Layout and routing , SPB 16.2 , field solver , PCB design , Allegro PCB Editor , Allegro

Verification

A Look Back On 2008 (Before Hazarding Predictions for 2009)

Before I dare take a stab at adding to the many predictions already made for 2009…

• 4 min read
HW/SW , verification strategy , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , OVM , Coverage-Driven Verification , CDV , Multi-domain verification: HW/SW co-verification , e , Enterprise Manager , Enterprise Planner , coverage driven verification (CDV)

Verification

The Eternal Debate: "Like" vs. "When" Inheritance

First: Happy New Year, Specmaniacs! Much like the rivarly between the New York Yankees…

• less than a min read
IEEE 1647 , Specman , verification strategy , Functional Verification , e , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

Digital Design

Coming This Friday January 9th: Encounter Digital Implementation Office Hours

Happy New Year everyone! I hope you all had a restful, enjoyable and healthy holiday…

• 1 min read
Digital Implementation forums , chat , Encounter Digital Implementation
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