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Analog/Custom Design

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Data Center

Innovation in Data Center Design and Operations: Highlights from Thésée Event

The Thésée event brought together key partners like France Télévisions, Thésée, Cadence…

Veena Parthan
• 5 min read
featured , Thésée Event , data center , Cadence Reality Digital Twin Platform

Corporate News

Don’t Miss the 2025 North America Open Meeting!

Join Visionaries, Discover Breakthrough Tech, and Power Your Next Big Idea Are you…

Corporate
• 1 min read
featured , innovation , Beta CAE , event , AI

Corporate News

Next Steps for the Cadence and SkyWater MPW Service

At Cadence, we are dedicated to nurturing future innovators. Our commitment to education…

Corporate
• 6 min read
news story , featured , Cadence Academic Network , SKY130
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Verification

Flexibility Often Yields Unexpected Results

Often, when engineers set out to build something, the result is different from the…

• 4 min read
Functional Verification , Founders at Work Stories of Startups' Early Days , ISX (Incisive Software Extensions)

Verification

OVM is "Open" for Business

Open things are just curiosities until the ecosystem figures out how to turn them…

• 1 min read
SystemVerilog , OVM Professionals Network , Functional Verification , Testbench simulation , OVM , OVMWorld

RF Engineering

Tip of the Week: Why Do Shooting and Harmonic Balance Phase Noise Results Differ…

Question: You are simulating your VCO in SpectreRF. You ran your PSS + Pnoise (noisetype…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design

Analog/Custom Design

Is mixed-signal simulation a fantasy?

The world is a mixed-signal one, or at least that's what were told. The concept of…

• less than a min read
mixed-signal simulators , Custom IC Design

Verification

Transaction-Based Acceleration - Second generation

Transaction-Based Acceleration is becoming more and more important as an extension…

• less than a min read
System Design and Verification

RF Engineering

Tip of the Week: Please explain in more practical (less theoretical) terms the concept…

Question: From spectre -h pnoise. I find the definition for oscillator linewidth…

• 2 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design

System, PCB, & Package Design 

What's good about CheckSysConf? Plenty!

While I suspect that many of our customers have used or heard about the CheckSysConf…

• 3 min read
CheckSysConf , PCB design

Digital Design

Who Designed the iPhone?

When people ask you what you do for a living, is your response as clumsy as mine…

• 1 min read
Digital Implementation , iPhone

System, PCB, & Package Design 

Second Generation PCI Express spreading roots

According to Jag Bolaria of the Linley Group, the 5 Gbps version of PCI Express…

• less than a min read
PCB Signal and power integrity , SPB , SerDes , PCB design

Digital Design

Statistical Timing Analysis - Has its time arrived?

At 45nm chip designs, manufacturing and process control becomes increasingly difficult…

• 2 min read
Static timing analysis , STA , Digital Implementation , SSTA , corner analysis

Verification

Trip to SoCal "techtorials" on CDV

Just finished packing for a quick trip to Southern California to help kickoff a round…

• 1 min read
Functional Verification , Coverage-Driven Verification , CDV

Verification

Is anybody out there a Software Verification Engineer?

In my 2004 book, Co-Verification of Hardware and Software for ARM SoC Design , I…

• 3 min read
co-verification engineer , System Design and Verification , EDA

System, PCB, & Package Design 

Did you know? Enriched schematic content available in PDF files from DEHDL (ConceptHDL…

For years, Concept-SCALD, and ConceptHDL (DEHDL) customers have been using various…

• 1 min read

RF Engineering

Measuring Transistor ft

So let’s consider a practical example of creating test benches and performing measurements…

• 5 min read
Measuring Transistor ft , RF design

System, PCB, & Package Design 

Shocking Technologies Becomes a Cadence Connections Member

In an announcement concurrent with Semicon West 2008, Shocking Technologies has …

• less than a min read
PCB Layout and routing , electrostatic discharge (ESD) dangers , Shocking Technologies , SPB , PCB design

Verification

C-to-Silicon Compiler Launch

On July 14th, Cadence introduced C-to-Silicon Compiler, a next-generation high-level…

• 1 min read
high-level synthesis adoption , C-to-Silicon Compiler

RF Engineering

Inductors On Demand, at least one RF design task can be really automated!

Inductors, transformers and transmission lines are critical components in any high…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso PCD , RF Block Simulation , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design , Circuit Design , Virtuoso Passive Component Designer , wireless integrated circuit verification

Digital Design

Customer Experiences With Low-Power Design

Hello and welcome to the new Cadence community site, and my first blog post. You…

• 4 min read
Low-Power , Logic Design , Digital Implementation , The Power Forward Initiative

Verification

Emulation Drivers - A growing set of selection criteria

Some say that the growth of the emulation market in last few years was driven by…

• 2 min read
Acceleration , System Design and Verification , Emulation , Hardware/software co-verification
CDNS - Fix Layout Hompage