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AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
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Blog - Post List

Latest blogs

Analog/Custom Design

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 2

Learn more about Cadence Education Services with this blog, which includes a list…

• 4 min read
digital badges , training bytes , Virtuoso , Virtuoso Video Diary , Virtuoso Layout

Breakfast Bytes

Razor Blades, Banking, and Antitrust

One person whose opinions I value is Ben Thompson of Stratechery. He produces a daily…

• 11 min read
ftc , stratechery , antitrust

System, PCB, & Package Design 

BoardSurfers: Bending the Flex Boards

When you design a rigid-flex board, the focus is, of course, on the bend. Your design…

• 3 min read
Allegro PCB Editor

Breakfast Bytes

RSAC: Motherhood and Apple Pie...and Breaking into a Prison

There is always an interesting sounding presentation at RSA that looks like it might…

• 6 min read
security , rsa conference , rsa

Breakfast Bytes

From Bootstrapped Startup to Profitability—with Lunch

Before I rejoined Cadence, I did a fair bit of writing for SemiWiki. One of the sponsoring…

• 5 min read
Jim Hogan , esd alliance

Breakfast Bytes

FCC Moves to Clear C-Band for 5G

Last week the FCC approved $9.7B to quickly clear the C-band for 5G. This could be…

• 7 min read
5G , fcc , mobile

PCB、IC封装：设计与仿真分析

极致PCB设计全流程 I 基础一：设计图纸导入

PCB设计启动，原理图、结构图的设计信息导入PCB设计工具时，您是否会有以下疑惑： 执行命令时，每个选项有什么意义？ DXF、IDX…这些文件都是什么？ 如何选择才能保证快速高质量完成PCB设计…

• less than a min read
PCB , Chinese blog , training , webinar , PCB设计 , 中文 , 直播网课 , online training , Allegro

Life at Cadence

Black History Is American History

“Not everything that is faced can be changed, but nothing can be changed until it…

• 6 min read
Insights on Culture , inclusion , Culture , STEM , Black History Month 2020 , diversity

Breakfast Bytes

Designing Radios: Integrand

Yesterday, in my post Designing Radios and Radar: AWR , I discussed the acquisition…

• 3 min read
5G , RF , integrand , awr , Virtuoso RF

Computational Fluid Dynamics

Masten Space Systems: Reactive Flow and Heat Transfer Optimization for Reusable …

Authors: Allan Grosvenor, Aerodynamics Lead, Masten Space Systems, USA - Jean-Charles…

• 4 min read
CFD , CFD Applications

Analog/Custom Design

Virtuosity: Auto Device Array - A One-Stop-Shop for Modgens

Hello everybody! I'm back with a new blog on Modgens. In this blog, I'm going to…

• 4 min read
Modgen On Canvas , MODGEN , APR Modgen , Advanced Node , auto device array , Layout EXL , Analog Layout Automation , ada , Analog Layout , Custom IC Design , modgens , Virtuoso Layout Suite , Custom IC

Breakfast Bytes

Designing Radios and Radar: AWR

As you probably know already, Cadence recently acquired AWR from National Instruments…

• 4 min read
microwave , integrand , AXIEM , awr design environemnt , visual system simulator , awr , RF design , microwave office

Digital Design

Are You Struggling to Meet the Timing for Your Design? Stop Worrying!

We know your designs are complex and so is timing analysis. We cannot change the…

• 1 min read

Breakfast Bytes

UMC Test Chip for Cadence Interface IP Is Working

Who was Taiwan's first semiconductor company? Who was Taiwan's first foundry? If…

• 5 min read
DDR4 , LPDDR4 , pcie 3 , PCIe , test chip , umc , DDR3 , LPDDR3

Life at Cadence

Tis’ the Season to Give

Cadence recently completed our fourth annual Season of Giving company-wide volunteer…

• 6 min read
Culture , Community , Work that matters , giving back , Season of Giving

System, PCB, & Package Design 

IC Packagers: Variable Text Labels and Template Reuse

For many, the information labels always go in a consistent location in the design…

• 4 min read
Allegro Package Designer , Allegro PCB Editor

Breakfast Bytes

Colossus: the First Programmable Digital Electronic Computer

Today is the first day of the RSA security conference in San Francisco. I will be…

• 7 min read
colossus , national museum of computing , bletchley park , museum

Breakfast Bytes

DesignCon: The Future of Fiber Optic Communications

At the recent DesignCon, Chris Cole gave the keynote The Future of Fiber Optic Communications…

• 8 min read
Ethernet , silicon photonics , photonics , datacenter , networking

定制IC芯片设计

Virtuosity: Property Editor可用性增强功能

“可用性概念“在我们的生活中随处可见，基于这个概念而产生的产品，便于使用及访问，并且更吸引眼球。因此，为了不断提升产品的可用性，在Virtuoso® Layout…

• less than a min read
Chinese blog , ICADVM18.1 , Virtuoso Layout Suite L , Property Editor , Custom IC Design , Virtuoso Layout Suite , IC6.1.8
CDNS - Fix Layout Hompage