Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Next Steps for the Cadence and SkyWater MPW Service

At Cadence, we are dedicated to nurturing future innovators. Our commitment to education…

Corporate
• 6 min read
news story , featured , Cadence Academic Network , SKY130

Corporate News

New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug

Verification engineers continually report that up to 70% of the total engineering…

Corporate
• 2 min read
news story , featured , verisium , AI

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Corporate News

The Automotive Revolution: A Glimpse into the Future

Are you ready for a driving revolution? Robert Schweiger's article, "How New Technology…

• 1 min read
Automotive , featured

Life at Cadence

LET’S MEET: Connecting and Creating Impact Through Networking

Cadence recently launched the LET’S MEET series, which aims to foster authenticity…

• 2 min read
inclusion , Cadence Culture , trust , Let's Meet , women at work , DEI , ambition , diversity , life at cadence , equity

SoC and IP

HBM3E: All About Bandwidth

The rapid rise in size and sophistication of AI/ML training models requires increasingly…

• 2 min read
featured , HBM , hbm4 , SerDes

Analog/Custom Design

Virtuoso Studio IC 23.1: Using Net Tracer for Design Review

This blog explores how Virtuoso Studio Net Tracer can help you perform a design review…

• 4 min read
IC 23.1 , Analog Design Environment , Cadence blogs , Virtuoso Studio , custom/analog , cadence , review , design review , analog , Virtuoso RF , Layout EXL , training , Layout Suite , Virtuoso Analog Design Environment , training bytes , Layout , Virtuoso , design , Virtuoso Video Diary , Analog Layout Automation , Analog Layout , Custom IC Design , Net Tracer , Virtuoso Layout Suite , Custom IC , blog

SoC and IP

How Cadence Is Revolutionizing Automotive Sensor Fusion

The automotive industry is currently on the cusp of a radical evolution, steering…

• 5 min read
Automotive , Sensor Processing , sensor fusion , Automotive SoC , automotive IP , NPU , AI

Verification

Root Cause Your Regression Failures Faster with Verisium PinDown

Use Verisium Pindown to identify the specific code commits that caused your regression…

• 2 min read
Functional Verification , verisium , pindown , codeminer , AI , waveminer

Analog/Custom Design

Start Your Engines: The Innovation Behind Universal Connect Modules (UCM)

Read this blog to know more about the innovation behind Universal Connect Modules…

• 6 min read
SystemVerilog , Start Your Engines , Spectre AMS Designer , Verilog-AMS , Mixed-Signal , mixed-signal verification

Verification

Evolution of AMBA CHI Protocol: Introducing Issue G Update

After the significant CHI Issue F update that introduced a number of important new…

• 2 min read
CHI Issue G , VIP , AMBA , CHI VIP , verification

Life at Cadence

Forging Connections Ignites Allyship

Allyship in the workplace is becoming increasingly important to building and sustaining…

• 3 min read
featured , DEI , LifeAtCadence , DEIatCadence

Life at Cadence

The Impact of the Talent Pipeline Program (TPP) on My 5-Year Journey at Cadence

The Talent Pipeline Program (TPP) at Cadence Design Systems has been a pivotal element…

• 2 min read

Verification

Mastering Triage in Verisium Manager: A Complete Guide

In today's complex verification environments, managing debug tasks efficiently is…

• 2 min read
debug , Triage , Regression , Verisium Manager

Computational Fluid Dynamics

Profiles in CFD with Guillaume Martinat

The Profiles in CFD series aims to provide insights into the latest trends and projects…

• 4 min read
Flying Whales , Profiles in CFD , Fidelity Fine Marine , simulation software , Cadence Fine Marine

Verification

Unravelling L0p Updates on the PIPE Interface

Power saving is an important aspect in PCIe devices and to leverage this, PCIe 6…

• 5 min read
Verification IP , pcie gen6 , PCIe 6.0 , l0p

Digital Design

All EVs Need the Midas Functional Safety Platform

A more appropriate title for this blog could be “All Vehicles with ADAS Need the…

FormerMember • 2 min read
conformal , Genus , functional safety , midas , Digital Implementation , Innovus

Verification

Demystifying Verification of PCIe 6.0 Equalization

The PCI-SIG Developers Conference 2024 is poised to be the premier event for professionals…

• 6 min read
Verification IP , equalization , PCIe , PCIe 6.0 , Training Sequences

Digital Design

Online Course: Start Learning About 3D-IC Technology

Designing 3D-ICs with integrity involves a commitment to ethical practices, reliability…

• 2 min read
Integrity 3D-IC Platform , 3D-IC , 2.5DiC , Digital Implementation , Innovus , moore's law , 3D-IC Technology , heterogenous integration , Allegro , system planner

Verification

Verification Using Near End Loopback

Near End Loopback (NELB) is a feature introduced by Intel's PHY Interface spec revision…

• 2 min read
Verification IP , NELB , PHY DUT

Data Center

How Data Centers Can Make AI Greener

As the world increasingly turns to artificial intelligence (AI) for its vast potential…

• 3 min read
CFD , featured , Reality , digital twin , Computational Fluid Dynamics , thermal

Artificial Intelligence (AI)

AI-Generated Constraint Methodology for PCB and IC Package Design Teams

It is well-known that constraint-driven designs are correct from the outset and adhere…

• 5 min read
PCB , featured , SoC , Constraint Methodology , AI/ML
CDNS - Fix Layout Hompage