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AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
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Blog - Post List

Latest blogs

SoC and IP

Is the latest DRAM bobsled run already coming to an end? Samsung and Hynix say “Maybe…

The semiconductor business has been cyclic ever since it came into existence half…

• 1 min read

Verification

Tech Tip: Save Steps With Automatic Witness Checks

This is just a quick reminder that the "witness_check" define command has an option…

• less than a min read
ABV , Functional Verification , Formal Analysis , formal , IEV , IFV

SoC and IP

Icy Dock internal multi-drive bay crams four 2.5-inch drives (SATA or SAS) into 5…

OK, so this blog entry isn’t about memory so much as it’s about a cool ancillary…

• 1 min read

SoC and IP

Super Talent caches Flash memory on USB 3.0 drive with 32 Mbytes of DRAM, performance…

There’s been plenty of discussion about using NAND Flash memory to cache HDDs and…

• 1 min read

Digital Design

Encounter Puzzler: Where Did My Fences Go?

A while back I visited a customer I see on a fairly regular basis. As soon as I entered…

• 1 min read
fences , Floorplanning , encounter , Digital Implementation , puzzler

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Polygon Selection? Look at SPB16.3 and See!

The Allegro PCB Editor allows selection of items by several means. In preselect mode…

• 1 min read
polygon , PCB , SPB16.3 , Allegro 16.3 , SPB 16.3 , SPB , PCB Editor , Layout , PCB design , Allegro PCB Editor , PCB Capture , Allegro

SoC and IP

SD Association adds pins to SD card format to boost transfer rates to 300 Mbytes…

Hot on the heels of the rollout of high-speed SDHC and SDXC UHS-I cards that approach…

• less than a min read

SoC and IP

Toshiba to ship 32-Gbyte SDHC UHS-I cards with 95/80-Mbytes/sec read/write speed…

If you’re a rabid fan of Canon dSLRs, you already know of the many controversial…

• 1 min read

SoC and IP

Rice U’s silicon-oxide memristor more phenomenon than device, for now

Last Friday, I wrote about a memristor development out of Jim Tour’s nano research…

• 3 min read

SoC and IP

Update on Viking’s SATADIMM SSD--no cable needed, Sandforce SSD controller

Previously, I wrote about Viking’s SATADIMM, an SSD built into a standard DDR DIMM…

• 1 min read

Verification

Users Employ Specman Constrained-Random Verification for Complex IP

Two recent customer examples have shown the effectiveness of Specman constrained…

• 1 min read
SystemVerilog , Specman , metric driven verification (MDV) , Cadence VIP portfolio , VIP , Coverage-Driven Verification , EDA , Funcional Verification , Incisive Enterprise Simulator (IES) , AOP , IES-XL

SoC and IP

Rice University reports that silicon oxide also good for memristors

Hot on the heels of the announcement earlier this week that Hynix is now an active…

• less than a min read

Verification

Performance Tips and Tricks: Coding e Ports for Enhanced Performance

This blog entry builds on last week's Tips and Tricks posting in which we discussed…

• 3 min read
IntelliGen , Specman , vr_ad , OVM-e , Funcional Verification , team specman , AOP , IES-XL

SoC and IP

The 6-minute video guide to memristors (must-see video)

With the August 31 announcement that Hynix is now working with HP to bring the semi…

• less than a min read

SoC and IP

Chemical vapor deposition creates improved material for PCM (phase-change memory…

Yesterday, semiconductor materials manufacturing specialist ATMI and Ovonics, the…

• less than a min read

SoC and IP

Commodore and its iconic all-in-one computers resurrected with new guts, including…

Everyone familiar with the arc of personal computers knows Commodore. The calculator…

• 1 min read

Verification

Join Us at FMCAD October 20-23

Are you deeply interested in formal and assertion-based verification technology?…

• less than a min read
Alok Jain , ABV , Functional Verification , Formal Analysis , formal , FMCAD , IEV , IFV

System, PCB, & Package Design 

What's Good About AMS Simulator New Design Templates? They’re in the SPB16.3 Release

What's Good About AMS Simulator New Design Templates? They're in the SPB16.3 Release…

• 1 min read
SPB16.3 , AMS , AMS simulator , SPB 16.3 , PSPICE , AMS simulation , Design Entry , Schematic

Verification

All I Really Need to Know About MDV I Learned From Hollywood - Part 2

My last blog entry began a series using quotes from Hollywood movies to illustrate…

• 2 min read
vPlan , verification planning , Verification IP modeling , metric-driven verification , MDV
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