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Cadence at DesignCon 2026: AI-Driven Design from Booth to Best Paper

When the industry's toughest engineering questions meet their sharpest minds, you…

Veena Parthan
• 6 min read
featured , AI-Driven Design , DesignCon 2026

Corporate News

Powering the AI Supercycle: Design for AI and AI for Design

At the IEEE International Solid-State Circuits Conference (ISSCC) 2026 in San Francisco…

Reela Samuel
• 4 min read
Multi-Agent Systems , featured , AI Supercycle , agentic ai , automation

Academic Network

Improved Efficiency: Longhorn Racing Transformed Analysis with Cadence Tools

Longhorn Racing, a cooperative student organization comprised of three Collegiate…

Kira Jones
• 2 min read
featured , Cadence Academic Network , simulation , System Design and Analysis

System, PCB, & Package Design 

Cadence's Acquisition of Hexagon D&E: A Game-Changer for Multiphysics Innovation

Having spent six rewarding years at Hexagon Design and Engineering (D&E), followed…

Stephen Smith
• 2 min read
Cadence Design Systems , featured , Hexagon , market leader , multiphysics
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Blog - Post List
Latest blogs

Verification

Breaking Down UPLI: A Protocol-Level Perspective on UALink 200

In the evolving landscape of high-performance computing, particularly in AI and ML…

• 3 min read
UAL , protocol layer , AI Accelerator , UALink , UPLI , AI

Data Center

Choosing the Right Data Center Strategy: Colocation vs Hyperscale vs Enterprise

It is essential to understand how colocation capacity planning differs from hyperscale…

• 7 min read
Colocation Data Center , enterprise datacenter , data center , hyperscale data center , digital twin , Celsius Studio , Cadence Reality Digital Twin Platform

Corporate News

Pointcloud – Helping Machines View the World in 3D

For humans, understanding the world in three dimensions comes naturally. We can instantly…

• 1 min read
designed with cadence

Verification

Validating UPLI Protocol Across Topologies with Cadence UALink VIP

The UPLI (UALink Protocol Level Interface) is a logical signaling interface that…

• 5 min read
UAL , protocol layer , VIP , UALink , UPLI

SoC and IP

Cadence Tapes Out 32GT/s UCIe IP Subsystem on Samsung 4nm Technology

With the rapidly increasing connectivity demands driven by AI/ML and HPC/datacenter…

• 3 min read
ucie , Design IP , chiplets , d2d

Verification

Cadence VLAB at the Automotive Software Frontier

The VLAB team at Cadence is participating in the 11th Automotive Software Frontier…

• less than a min read
Automotive , vlab , virtual platform , embedded software , event

Data Center

AI, GPU, and HPC Data Centers: The Infrastructure Behind Modern AI

Artificial intelligence (AI) is stretching compute infrastructure well beyond what…

• 6 min read
GPU data center , AI data center , data center , data center cooling , digital twin , Cadence Reality Digital Twin Platform

SoC and IP

CES 2026 Recap: Trust Built on a Real, Working eUSB2V2 System Demo

Nothing builds trust like a real working system. That was the guiding principle…

• 4 min read
controller IP , Design IP , cadence , CES , PHY , USB , USB 2.0 , semiconductor IP , Design IP and Verification IP , AI

Digital Design

The Design Maze Adventure — And the GPS That Saves the Day!

You don't walk into a modern design flow. You step inside it… and immediately realize…

• 4 min read
Cadence Online Support , training , youtube videos , training bytes , online training

SoC and IP

Scale-Up and Scale-Out IP for Optical Interconnect for Accelerated Computing

Optical connectivity is foundational to modern data centers, enabling high-bandwidth…

• 4 min read
AI data center , AI factory , Data Center architecture

Corporate News

From Cloud to Sensor: Neuronova on Building Truly Efficient AI Sensors

As AI moves from the cloud to the edge, power is becoming the new bottleneck, replacing…

• 6 min read
designed with cadence , AI

Cadence Japan

日本ケイデンス、「働きがいのある会社」 ベスト１００に5年連続で選出

日本ケイデンス・デザイン・システムズ社（横浜市港北区新横浜）は、Great Place To Work® Institute Japan（以下、GPTW Japan…

• less than a min read
news story , Culture , featured , japanese blog

Data Center

What Is Power Usage Effectiveness (PUE) in Data Centers?

Why PUE Still Matters Walk into a modern AI data center, and the first thing you…

• 7 min read
data center , Data Center Design , PUE , digital twin , Celsius Studio , Reality Digital Twin , data center digital twin , Power Usage Effectiveness , Data Center architecture

中文技术专区

Genus 培训课程中文字幕现已上线，EDA 学习不用啃英文了！

想象一下：你正沉浸在一部精彩的网剧里，剧情跌宕、角色鲜活。突然剧中人物开始讲你完全听不懂的语言。你会慌吗？当然不！你很淡定的瞄了一眼字幕，继续吃着薯片喝着奶茶追剧…

• less than a min read
Course , training , Genus Synthesis Solution

Corporate News

Neuronova – Scaling Ultra-Low-Power Edge Intelligence for Smart Devices

For decades, the data collection pipeline for sensors has been the exact same—measure…

• 2 min read
designed with cadence

Analog/Custom Design

A Journey Through 2025: Learning, Innovation, and Momentum

Cadence Training 2025 Year in Review: 30 New Blogs, Accelerated Learning Expansion…

• 5 min read
online_training , Accelerated_Learning , live_training , Virtuoso Studio , pegasus , VirtuosoADE , Training_Byte , webinar , Layout , learning map , digital_badge , EMX Solver , Custom IC

System, PCB, & Package Design 

Clarity Solver’s Automated Channel Extraction (ACE) to Be Featured at DesignCon

Visit us at DesignCon 2026 , February 24-26, at booth 827, to discover Clarity 3D…

• 1 min read
Power Integrity , Signal Integrity , Clarity 3D Solver

Digital Design

Bite-Sized Learning for Big SoC Challenges: Genus Training Bytes

In the fast-paced world of digital design, every engineer knows the truth: tapeout…

• 5 min read
digital design , videos , online courses , optimization , training bytes , Genus Synthesis Solution , Synthesis , online training

Data Center

Data Center Cooling: Thermal Management, CFD, & Liquid Cooling for AI Workloads

Data center cooling is now a first-order design constraint, not an afterthought,…

• 6 min read
data center , data center cooling , digital twin , Celsius Studio , Cadence Reality Digital Twin Platform
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