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SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology
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Blog - Post List

Latest blogs

Breakfast Bytes

What's For Breakfast? Video Preview January 9th to 13th 2017

https://youtu.be/33fiVk2BoKo Coming from Flamingo Hotel, Las Vegas at during…

• less than a min read
security , risc-v , ACE award , Consumer Electronics Show , CES , Palladium , encryption , privacy , esd alliance

Breakfast Bytes

MediaTek's Experience with Perspec

At CDNLive in Taiwan last year, MediaTek presented their experiences with Perspec…

• 3 min read
CDNLive , Perspec , cdnlive taiwan , mediatek , System Verifier , Breakfast Bytes

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? Vince’s Favorite Usability Features! (Reason 10…

Most of the PCB designers I know are creatures of habit just like I was... we…

• 7 min read
Allegro 17.2 , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

IEDM: Coventor Panel on BEOL Challenges

At the recent IEDM in San Francisco, Coventor organized a panel titled BEOL Barricades…

• 6 min read
tokyo electron , cobalt , copper , Samsung , Lam Research , Coventor , GlobalFoundries , beol , umc , rubidium , Breakfast Bytes , liner

Verification

Bugs, Problems, Issues, and Features

There’s no better way to demonstrate the value of a verification tool than to find…

• 3 min read
performance , uvm , pswg , Functional Verification , Perspec , OVM , issue , bug , feature , Accellera , Problem , portable stimulus

Breakfast Bytes

Dolby Atmos and Tensilica

Dolby Laboratories was founded by Ray Dolby. I always thought he was English, but…

• 3 min read
Consumer Electronics Show , CES , audio dsp , atmos , HiFi , Dolby , Tensilica , television , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Active Safety Features

In this week's Whiteboard Wednesdays video, the last in a three-part series on automotive…

• less than a min read
Automotive , Whiteboard Wednesdays , functional safety , Active Safety , automotive electronics , Charles Qi

Breakfast Bytes

Alexa: Is VUI the New GUI?

Just before the holidays I gave in and purchased an Amazon Echo, the small hockey…

• 4 min read
alexa , echo dot , voice , Siri , Amazon , Breakfast Bytes , echo

Breakfast Bytes

Pat Pistilli: the First Cell Library, the First DRC File, the First Computer-Printed…

You probably know that DAC is run by a company called MP Associates. It was started…

• 6 min read
DAC , cell library , drc file , wire-wrap , pat pistil , Bell Labs , label , avery , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview January 2nd to 6th 2017

https://youtu.be/bGsKR-RG0fY Coming from Mission San Juan Bautista, California…

• less than a min read
DAC , alexa , Consumer Electronics Show , CES , Perspec , EDA , vui , cdnlive boston , pat pistilli , Tensilica , Coventor , Amazon , mediatek , Design Automation Conference , beol , IEDM

Verification

Report From the 17th MTV Workshop in Austin

Austin is always a nice place to visit, and last week I spent a few days there to…

• 3 min read
security , Perspec , Safety , formal , workshop , SoC , Test , ISO 26262 , MTV , power , microprocessor , portable stimulus , verification

System, PCB, & Package Design 

OnDemand links to our Allegro PCB & PSpice 2016 Webinars and looking to 2017...

As we wrap up 2016, I wanted to share the quick access links to all of our OnDemand…

• 2 min read

Breakfast Bytes

Silicon Photonics

You probably already know that much of the traffic inside the data center, and indeed…

• 9 min read
mach zehnder interferometer , waveguide , fiber optic , ring coupler , light , silicon photonics , mode , Breakfast Bytes

System, PCB, & Package Design 

What’s Good About Allegro PCB Editor New Concurrent Team Design? New Capabilities…

The 17.2 Allegro PCB Editor has new concurrent team design capabilities. For details…

• 3 min read
PCB , Cadence Design Systems , Allegro 17.2 , Allegro GUI , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Allegro

Breakfast Bytes

Branko's Elephant Chart

There are several areas where semiconductor technology and society come together…

• 5 min read
branko's elephant chart , world bank , global income distribution , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Automotive Functional Safety and the ISO 26262 Standard

In this week's Whiteboard Wednesdays video, the second in a three-part series, Charles…

• less than a min read
Automotive , Whiteboard Wednesdays , functional safety , automotive electronics , Charles Qi , ISO 26262

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? New Design Level Checks! (Reason 9 of 10)

The Allegro PCB 17.2-2016 release is loaded with enhancements related to the DRILL…

• 2 min read
Allegro 17.2 , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Analog/Custom Design

Virtuoso Video Diary: Introducing the New Search Functionality in Hierarchy Edit…

Are you still crawling through the set of tabs, panes, or tables in the Hierarchy…

• 2 min read
Search , HED , Virtuoso Video Diary , hierarchy editor

Breakfast Bytes

RISC-V: Codasip, BaySand, and More

Recently the RISC-V Fifth Workshop took place at Google in Mountain View. As always…

• 3 min read
UltraSoC , risc-v , codasip , BaySand , Codeplay , Breakfast Bytes
CDNS - Fix Layout Hompage