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Featured

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
Corporate 2 Oct 2025 • 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
Corporate 1 Oct 2025 • 4 min read
Edge AI , featured , Ambarella
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Blog - Post List

Latest blogs

Breakfast Bytes

RISC-V: Codasip, BaySand, and More

Recently the RISC-V Fifth Workshop took place at Google in Mountain View. As always…

Paul McLellan 14 Dec 2016 • 3 min read
UltraSoC , risc-v , codasip , BaySand , Codeplay , Breakfast Bytes

Breakfast Bytes

Lip-Bu Tan Receives the Exemplary Leadership Award from GSA

Last week, Lip-Bu Tan, the CEO of Cadence, received the Dr. Morris Chang Exemplary…

Paul McLellan 13 Dec 2016 • 5 min read
gas , cadence , fsa , fabless , TSMC , Lip-Bu Tan , morris change exemplary leadership award , Morris Chang , Breakfast Bytes

Academic Network

Meet the BarCamp Concept!

BarCamp was inspired by an invitation-only participant-driven conference, named Foo…

ChristinaK 12 Dec 2016 • 2 min read
virtual platforms , Cadence Academic Network , BarCamp , Formal AMS Verification , System-level Sensitivity Analysis , edaBarCamp , Highly distributed embedded platforms

Breakfast Bytes

IEDM: 7nm from TSMC and IBM/GLOBALFOUNDRIES/Samsung

At IEDM last week, there were papers in eight parallel tracks for three days. At…

Paul McLellan 12 Dec 2016 • 3 min read
IBM , Samsung , TSMC , 193i , FinFET , GlobalFoundries , 7nm , EUV , Breakfast Bytes

Analog/Custom Design

Virtuoso Video Diary: Using the New IE-Card Based Setup in ADE Explorer

Interface Element (IE) Setup can be one of the most challenging parts in AMS Designer…

GarimaSharma 9 Dec 2016 • 5 min read
Analog Design Environment , ADE Explorer , AMS in ADE , AMS Designer , IE Card Setup , ADE , Virtuoso Video Diary

Breakfast Bytes

Tensilica at CES: Hololens Will Be There, Will You?

It's a new year soon. And that means New Year Resolutions. I will go to the gym.…

Paul McLellan 9 Dec 2016 • 3 min read
hololens , Consumer Electronics Show , CES , vision processing , ADAS , autonomous vehicles , Breakfast Bytes , HiFi Audio

System, PCB, & Package Design 

How to Tailor Your PCB and IC Package Modeling With "Cut and Stitch" to Generate…

As an experienced SI expert, you likely apply multiple solvers and simulators to…

Sigrity 8 Dec 2016 • 3 min read
3D full wave extraction , cut and stitch , Signal Integrity , serial link compliance , SerDes , Sigrity , PowerSI

Breakfast Bytes

Can Computers Think? Or Understand Chinese?

I have been working with computers for a long time. I first learned to program in…

Paul McLellan 8 Dec 2016 • 5 min read
searle , artificial intelligence , Chinese room , Turing test , neural nets , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview December 12th to 16th

https://youtu.be/wtOOIg32ma8 Monday: Lip-Bu Tan is honored by GSA with the Maurice…

Paul McLellan 7 Dec 2016 • less than a min read
risc-v , codasip , IBM , branko's elephant chart , Samsung , TSMC , gf , Lip-Bu Tan , silicon photonics , photonics , gsa , GlobalFoundries , 7nm , IEDM , maurice chang

Breakfast Bytes

IEDM: The Big Decisions for 5nm

The Sunday of IEDM there were two all-day short courses . The one I attended was…

Paul McLellan 7 Dec 2016 • 6 min read
SADP , gas , contact liner , horizontal nanowire , lelele , lex , 193i lithography , cobalt , copper , contact , LELE , FinFET , 5nm , le2 , nanowire , vertical nanowire , le3 , EUV , IEDM , gate all around , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays—What's New with PCI Express Gen4

In this week's Whiteboard Wednesdays video, the last of a 3-part series, Lana Chan…

References4U 6 Dec 2016 • less than a min read
Whiteboard Wednesdays , PCIe Gen4 , PCIe

Verification

Perspectives on Developing EDA Standards

Last week, my colleague Paul McLellan published a blog post on the standardization…

tomacadence 6 Dec 2016 • 4 min read
uvm , 1394 , pswg , Perspec , OVM , USB , IEEE 1500 , Accellera , VCX , VCi , PCI , portable stimulus

Analog/Custom Design

Virtuoso Video Diary: Extending Trunks for Selected Nets While Routing

You must have come across and experienced the capabilities of Pin to Trunk routing…

Parula 6 Dec 2016 • 3 min read
Pin to Trunk , Virtuoso Space-based Router , Trunk Extending , Virtuoso Video Diary , Extending Trunks , Custom IC Design

Verification

Bluetooth 5: Making Your Smart Home a Reality

We all know the futuristic vision of the world just around the corner. The vision…

Priyab 5 Dec 2016 • 3 min read
Verification IP , Bluetooth Low Energy , IoT , VIP , BLE , Tensilica , design , mobile , and Verification IP , Bluetooth 5 , Bluetooth 5.0 , Smart Home

Breakfast Bytes

James Adams Talks About How Raspberry Pi Was Designed

I wrote recently about Eben Upton's presentation about the genesis of business-card…

Paul McLellan 5 Dec 2016 • 4 min read
ARM Techcon , Raspberry Pi , raspberry pi foundation , raspberry pi 3 , OrCAD , Sigrity , Breakfast Bytes , Allegro

Breakfast Bytes

RISC-V Available in Silicon

One of the announcements at the recent RISC-V workshop was by SiFive . This is the…

Paul McLellan 5 Dec 2016 • 4 min read
risc-v , freedom everywhere 310 , hifive1 , open source hardware , fe310 , open source , Arduino , Breakfast Bytes , sifive

Analog/Custom Design

Analog Design Resonance: Playing with Violation Filters

We'd like to welcome guest writer Yanyan Qiao from our Cadence Japan AE team. Many…

TeamADE 4 Dec 2016 • 2 min read
Explorer , asserts , ADE XL , Virtuoso ADE , Assembler , device checks

Breakfast Bytes

RISC-V 5th Workshop Highlights

The fifth (V th ?) RISC-V workshop took place this week at Google in Mountain View…

Paul McLellan 2 Dec 2016 • 5 min read
risc-v , codasip , risc-v foundation , isa , Breakfast Bytes , sifive

Breakfast Bytes

What's For Breakfast? Video Preview December 5th to 9th

https://youtu.be/IAPCDXodsno Monday: James Adams of the Raspberry Pi foundation…

Paul McLellan 1 Dec 2016 • less than a min read
risc-v , Raspberry Pi , hifive1 , 5 nanometer , Chinese room , OrCAD , 5nm , computer consciousness , IEDM , sifive , computer thought , Allegro
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