Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
• 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC

Corporate News

Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

Corporate
• 6 min read
Automotive , featured , physical ai , automotive electronics , AI

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI
cdns - all_blogs_categories

Blog - Post List

Latest blogs

PCB解析／ICパッケージ解析

BoardSurfers: Training Insights: Sigrity Auroraオンラインコースの紹介

SigrityTM Aurora オンラインコースは、Sigrity Aurora の使用を開始するために必要な基本的なトレーニングを提供します。このコースでは…

• 1 min read
Sigrity Aurora , BoardSurfers , what's new , 22.1 , Signal Integrity , Training Insights , Sigrity , japanese blog

The India Circuit

Shekhar Kumar: The Road To Success Comes Through Hard Work

Subsequent to my previous blog about the Cadence Scholarship Program, I bring to…

• 3 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Corporate News

Hermeus Is Reaching for Mach 5 Speed

Hermeus is a company that’s looking to radically accelerate air travel. For the past…

• 1 min read
CFD , Pointwise , designed with cadence , fidelity

Analog/Custom Design

Knowledge Booster Training Bytes - Routing Techniques for Custom IC Layout Design…

This blog introduces you to different routing styles for Custom IC layout design…

• 5 min read
shield routing , Routing , stranded routing , Virtuoso Layout Productivity , Virtuoso Layout EXL , Layout EXL , Layout Suite , ICADVM20.1 , differential pair routing , Virtuoso Layout Suite , Virtuoso Layout Suite XL

System, PCB, & Package Design 

BoardSurfers: Training Insights: Improve your ‘SKILL’ with Allegro PCB Editor

Cadence SKILL is a high-level, interactive programming language based on the popular…

• 2 min read
BoardSurfers , QIR 2 , 22.1 , Training Insights , Allegro PCB Editor , online training , Allegro

Analog/Custom Design

Knowledge Booster Training Bytes - The Spectre FX Circuit Simulator

Today’s complex analog mixed-signal designs need high accuracy and fast simulation…

• 2 min read
blended , blended training , Spectre 21.1 , learning , Spectre Circuit Simulator , training , Cadence training , digital badges , training bytes , Virtuoso , Spectre , Cadence certified , Virtuoso Video Diary , Custom IC Design , online training , Custom IC

Analog/Custom Design

Knowledge Booster Training Bytes - The Spectre X Simulator

About ten years after Spectre APS was released, we decided to develop and release…

• 3 min read
blended , learning , digital badges , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , spectre x , online training , Custom IC

Computational Fluid Dynamics

Why You Should Attend CadenceCONNECT CFD on 19 April

A while back, DEVELOP3D's Al Dean wrote about why it's a good idea to attend user…

• 1 min read
CFD , Computational Fluid Dynamics , Fidelity CFD , CadenceCONNECT CFD

Verification

Training Insights – Webinar – Automating Bug Tracking with Verisium Debug and Python…

The Verisium Debug platform is optimized for scalability, supporting debugging of…

• 1 min read
Verification planning and management , training , webinar , Verisium Debug

System, PCB, & Package Design 

Cadence OrCAD and Allegro 22.1 HotFix 003 Is Now Available

The HotFix 003 (QIR2) update for OrCAD® and Allegro® 22.1 is now available at Cadence…

• 3 min read
APD+ , TopXp , Cadence Design Systems , featured , 22.1 , Allegro Package Designer , Topology Explorer , PCB design , Allegro System Capture , Allegro PCB Editor , Pulse , Allegro

Digital Design

Voltus Voice: How Voltus RTL Power Analysis Enables Sustainable Innovation

This blog discusses how the Voltus RTL power analysis flow reduces power consumption…

• 5 min read
Low Power , Silicon Signoff and Verification , featured , Voltus IC Power Integrity Solution , sustainable design , RTL-to-GDSII , sustainable development goals , Digital Implementation , Power Analysis

SoC and IP

The Five Must-Have Features of Modern Automotive SoC Architectures

Groundbreaking innovations demand state-of-the-art system-on-chip (SoC) architectures…

• 3 min read
security , Automotive , Low Power , featured , Safety , system-on-chip , predictability , real-time processor , architectures , high performance , connectivity

Corporate News

Damen Is Making Waves with Cadence CFD and Cloud Solutions

Damen is an international shipbuilding group with more than 50 shipyards in over…

• 1 min read
CFD , Marine Engineering , naval architecture , marine , cloud , designed with cadence , cadence cloud

Analog/Custom Design

Virtuosity: Accelerate Your EM-IR Closure with Voltus-XFi Custom Power Integrity…

This blog gives you some very good reasons to upgrade your EM-IR solution to Voltus…

• 4 min read

Spotlight Taiwan

SoC設計工程師絕對需要的新一代除錯解決方案！

作者: Rich Chang, Product Marketing Director, Cadence 參考原文: What Makes a Next-Generation…

• less than a min read
Verisium Apps , taiwanese blog , Verisium Debug , verification

Analog/Custom Design

Virtuoso ICADVM20.1 ISR31 and IC6.1.8 ISR31 Now Available

The ICADVM20.1 ISR31 and IC6.1.8 ISR31 production releases are now available for…

• 2 min read
Cadence blogs , ADE Explorer , Virtuoso RF Solution , IC Release Announcement blog , Virtuoso Analog Design Environment , Virtuoso , ViVA , ICADVM20.1 , IC Release Blog , Custom IC Design , IC6.1.8 , Cadence Community , ADE Assembler

Computational Fluid Dynamics

Predicting Hull Resistance Curve Using Fidelity FINE Marine

In this user case, Marintek uses Fidelity Fine/Marine and Hexpress for resistance…

• 4 min read
CFD , hull design , FINE Marine , marine design , Fidelity CFD , engineering , simulation software

Corporate News

How Do 3D-IC Designs Make More Than Moore a Possibility?

With applications such as metaverse, autonomous driving, and high-performance computing…

• 3 min read
3D-IC , Cadence Integrity 3D IC Design Platform

Spotlight Taiwan

利用Dynamic Duo加速整體軟硬體驗證與確認的生產力

原文作者: Reela 原文出處: Accelerating Your Overall HW/SW Verification and Validation Productivity…

• less than a min read
dynamic duo , Analog Devices. ADI , software verification , validation , protium x2 , verisium , taiwanese blog , Hardware/software co-verification , verification
CDNS - Fix Layout Hompage