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AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
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Blog - Post List

Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - Active Safety Features

In this week's Whiteboard Wednesdays video, the last in a three-part series on automotive…

• less than a min read
Automotive , Whiteboard Wednesdays , functional safety , Active Safety , automotive electronics , Charles Qi

Breakfast Bytes

Alexa: Is VUI the New GUI?

Just before the holidays I gave in and purchased an Amazon Echo, the small hockey…

• 4 min read
alexa , echo dot , voice , Siri , Amazon , Breakfast Bytes , echo

Breakfast Bytes

Pat Pistilli: the First Cell Library, the First DRC File, the First Computer-Printed…

You probably know that DAC is run by a company called MP Associates. It was started…

• 6 min read
DAC , cell library , drc file , wire-wrap , pat pistil , Bell Labs , label , avery , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview January 2nd to 6th 2017

https://youtu.be/bGsKR-RG0fY Coming from Mission San Juan Bautista, California…

• less than a min read
DAC , alexa , Consumer Electronics Show , CES , Perspec , EDA , vui , cdnlive boston , pat pistilli , Tensilica , Coventor , Amazon , mediatek , Design Automation Conference , beol , IEDM

Verification

Report From the 17th MTV Workshop in Austin

Austin is always a nice place to visit, and last week I spent a few days there to…

• 3 min read
security , Perspec , Safety , formal , workshop , SoC , Test , ISO 26262 , MTV , power , microprocessor , portable stimulus , verification

System, PCB, & Package Design 

OnDemand links to our Allegro PCB & PSpice 2016 Webinars and looking to 2017...

As we wrap up 2016, I wanted to share the quick access links to all of our OnDemand…

• 2 min read

Breakfast Bytes

Silicon Photonics

You probably already know that much of the traffic inside the data center, and indeed…

• 9 min read
mach zehnder interferometer , waveguide , fiber optic , ring coupler , light , silicon photonics , mode , Breakfast Bytes

System, PCB, & Package Design 

What’s Good About Allegro PCB Editor New Concurrent Team Design? New Capabilities…

The 17.2 Allegro PCB Editor has new concurrent team design capabilities. For details…

• 3 min read
PCB , Cadence Design Systems , Allegro 17.2 , Allegro GUI , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Allegro

Breakfast Bytes

Branko's Elephant Chart

There are several areas where semiconductor technology and society come together…

• 5 min read
branko's elephant chart , world bank , global income distribution , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Automotive Functional Safety and the ISO 26262 Standard

In this week's Whiteboard Wednesdays video, the second in a three-part series, Charles…

• less than a min read
Automotive , Whiteboard Wednesdays , functional safety , automotive electronics , Charles Qi , ISO 26262

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? New Design Level Checks! (Reason 9 of 10)

The Allegro PCB 17.2-2016 release is loaded with enhancements related to the DRILL…

• 2 min read
Allegro 17.2 , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Analog/Custom Design

Virtuoso Video Diary: Introducing the New Search Functionality in Hierarchy Edit…

Are you still crawling through the set of tabs, panes, or tables in the Hierarchy…

• 2 min read
Search , HED , Virtuoso Video Diary , hierarchy editor

Breakfast Bytes

RISC-V: Codasip, BaySand, and More

Recently the RISC-V Fifth Workshop took place at Google in Mountain View. As always…

• 3 min read
UltraSoC , risc-v , codasip , BaySand , Codeplay , Breakfast Bytes

Breakfast Bytes

Lip-Bu Tan Receives the Exemplary Leadership Award from GSA

Last week, Lip-Bu Tan, the CEO of Cadence, received the Dr. Morris Chang Exemplary…

• 5 min read
gas , cadence , fsa , fabless , TSMC , Lip-Bu Tan , morris change exemplary leadership award , Morris Chang , Breakfast Bytes

Academic Network

Meet the BarCamp Concept!

BarCamp was inspired by an invitation-only participant-driven conference, named Foo…

• 2 min read
virtual platforms , Cadence Academic Network , BarCamp , Formal AMS Verification , System-level Sensitivity Analysis , edaBarCamp , Highly distributed embedded platforms

Breakfast Bytes

IEDM: 7nm from TSMC and IBM/GLOBALFOUNDRIES/Samsung

At IEDM last week, there were papers in eight parallel tracks for three days. At…

• 3 min read
IBM , Samsung , TSMC , 193i , FinFET , GlobalFoundries , 7nm , EUV , Breakfast Bytes

Analog/Custom Design

Virtuoso Video Diary: Using the New IE-Card Based Setup in ADE Explorer

Interface Element (IE) Setup can be one of the most challenging parts in AMS Designer…

• 5 min read
Analog Design Environment , ADE Explorer , AMS in ADE , AMS Designer , IE Card Setup , ADE , Virtuoso Video Diary

Breakfast Bytes

Tensilica at CES: Hololens Will Be There, Will You?

It's a new year soon. And that means New Year Resolutions. I will go to the gym.…

• 3 min read
hololens , Consumer Electronics Show , CES , vision processing , ADAS , autonomous vehicles , Breakfast Bytes , HiFi Audio

System, PCB, & Package Design 

How to Tailor Your PCB and IC Package Modeling With "Cut and Stitch" to Generate…

As an experienced SI expert, you likely apply multiple solvers and simulators to…

• 3 min read
3D full wave extraction , cut and stitch , Signal Integrity , serial link compliance , SerDes , Sigrity , PowerSI
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