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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

Learning and Support

The Evolution of Cadence Help - I

Change, being a fact of life, is inevitable even for software systems. We have come…

• 1 min read
Self-Help , videos , Self Learning , what's new , Support , Cadence Help , Help resource , Cadence support

Breakfast Bytes

Semiconductor Specialization Versus Valuation

At SEMICON China, Wally Rhines gave one of the keynotes on the opening day. It was…

• 4 min read
Wally Rhines , Semiconductor , consolidation

Breakfast Bytes

What's For Breakfast? Video Preview April 9th to 13th 2018

https://youtu.be/xEgjpNWtC1I Coming from Santa Clara Convention Center Theater…

• less than a min read
CDNLive , linley group , h-1b , Tensilica , microprocessor

Breakfast Bytes

How Low Can You Go?

I slipped into an obscure bar in the no-man's-land between Santana Row and downtown…

• 6 min read
3nm , imec , 5nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Interfaces—If You’re Not First, You’re Last

In this week’s Whiteboard Wednesday video, Tom Hackett recounts two personal experiences…

• less than a min read
Whiteboard Wednesdays , IP , LPDDR , NVMe , USB , SoC Interface , Type-C

Verification

New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP

As discussed in the previous installments of the blog, the recent update of the AMBA…

• 3 min read
amba5 , Verification IP , ACE VIP , AXI VIP , AMBA

Breakfast Bytes

Deep Blue, AlphaGo, and AlphaZero

There are three major events in computers learning to play board games at a very…

• 6 min read
artificial intelligence , alphago , alphazero , go , deep blue , chess

Verification

NVMe Express 1.3: Addressing the Storage Needs of the Data Revolution from Enterprise…

The amount of data we are generating and consuming has exploded in recent years.…

• 2 min read
Verification IP , NVM Express , NVMe , IoT , VIP , cloud , big data , storage , PCIe , PCI Express , data centers

Breakfast Bytes

SEMICON China: Big, Really Big

When I was at embedded world in Nuremberg recently, I ran into Dick Selwood because…

• 9 min read
semicon , semicon china , 3D NAND , DRAM , 200mm

Verification

List of TLM Analysis Ports: Where Is This Packet Coming From?

Let’s say that you got an invitation from the police station nearest your home to…

• 4 min read
Specman , Functional Verification , e , e language , team specman , xcelium

Breakfast Bytes

Clayton Christensen and the Innovator's Dilemma

One of the most readable and influential business books of the last 20 years was…

• 9 min read
christensen , kodak , innovator's dilemma , digital equipment corporation

Analog/Custom Design

Virtuosity: What if I Want to Disable the Filtered Corners?

You'll now be an expert at using the Corner Filters in Virtuoso ADE Assembler and…

• 4 min read
Corners , ADE Explorer , filter , Filtering , ADE , Virtuoso Analog Design Environment , Virtuoso , Analog Design Environment , Virtuosity , Custom IC Design , Custom IC , ADE Assembler

The India Circuit

A Long Way From The 80's: New Kids On The Technology Block

I was cruising through Facebook today and saw a video posted by George Takei Presents…

• 3 min read
Government of India , Amrita Vishwa Vidyapeetham , RayBaby , Indian elections , prosthetic , electronic voting machine

Breakfast Bytes

Hennessy and Patterson Receive the 2018 Turing Award

The 2018 Turing Award, informally the Nobel prize in Computer Science, has been awarded…

• 5 min read
risc-v , hennessey , MIPS , patterson , RISC

System, PCB, & Package Design 

Some Don't Like It Hot: Thermal Model Exchange

Engineers today are faced with complex as well rapid design changes that require…

• 2 min read
CFD , neutral file format , electrical-thermal co-simulation , Sigrity , thermal , PowerDC

Breakfast Bytes

Tools and Processors for Computer Vision...and the Summit

When I was at embedded world in Nuremberg recently, I ran into Jeff Bier, the head…

• 3 min read
Embedded Vision Summit , Embedded Vision Alliance , Tensilica , vision , neural networks

Whiteboard Wednesdays

Whiteboard Wednesdays - Doing More With Less—Software GPS and Tensilica Processors…

In this week’s Whiteboard Wednesday video, Tom Hackett describes a theoretical IoT…

• less than a min read
Whiteboard Wednesdays , sensor , IoT , Tensilica

Verification

What’s Hot in Verification at this Year’s CDNLive? It’s Portable Stimulus Again!

CDNLive is a user conference, and verification is one of the largest categories of…

• 2 min read
CDNLive , Perspec , pss , portable stimulus

Breakfast Bytes

What's For Breakfast? Video Preview April 2nd to 6th 2018

https://youtu.be/r6ctqTVCoH0 Coming from deep in space (camera Sean) Monday: SEMICON…

• less than a min read
Standard Cell , alphago , China , alphazero , semicon , 3nm , imec , SPIE , 2001
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