Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda

Corporate News

The New ASK Portal Brings a Smarter, Faster, and More Intuitive Experience

Finding the right support content should be simple, fast, and intuitive. The new…

Corporate
• 2 min read
featured , customer support , New ASK Portal , ASK Gen AI

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
• 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Corporate News

Skycore Partners with Cadence to Create Energy-Efficient Data Center ICs

The explosive surge of artificial intelligence and electrification is driving a sharp…

• 3 min read
spectre simulation , Cadence Oncloud , Virtuoso Studio , Xcelium Logic Simulator , designed with cadence , Genus Synthesis Solution , Innovus Implementation

System, PCB, & Package Design 

Free Signal Integrity

What do we mean by free signal integrity? Be sure to attend our joint Wild River…

• 1 min read
DesignCon , Signal Integrity , Digital Twins , PCB design

SoC and IP

Symmetric Multiprocessing (SMP) RTOS on Xtensa Multicore

An increasing number of multi-threaded embedded applications want to leverage multicore…

• 8 min read
featured , Symmetric Multiprocessing , SMP , Tensilica , FreeRTOS , Xtensa , multicore , RTOS , multiprocessing

Analog/Custom Design

The Year That Was: Knowledge Booster Training Bytes Blog and Video Highlights from…

This blog takes us back into 2024 and highlights our new blogs, trainings and training…

• 5 min read
blended training , Virtuoso Analog Design Environment , Cadence training , digital badges , training bytes , Virtuoso , Cadence certified , iPegasus , Custom IC Design , Virtuoso Layout Suite , Custom IC

Analog/Custom Design

Virtuoso Studio IC23.1 ISR12 Now Available

Virtuoso Studio IC23.1 ISR12 production release is now available for download.

• 2 min read
Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso , Custom IC Design , Custom IC , IC design , IC23.1

Digital Design

Need to Reconfigure Your SoC to Meet Functional Safety Standards?

The ISO 26262 standard provides functional safety guidance for semiconductors used…

FormerMember • 1 min read
Automotive , functional safety , midas , ISO 26262

Life at Cadence

Cadence Ireland Sponsors Fahy Rovers Girls Soccer Team

Recently, Cadence Ireland sponsored training tops for a local girls' soccer team…

• 4 min read
Cadence Ireland , LifeAtCadence

System, PCB, & Package Design 

Exploring Themes in OrCAD X Capture

The dark theme turns many user interface elements of your application dark and reduces…

• 3 min read
PCB , Cadence Design Systems , OrCAD X Capture , SPB , PCB design , OrCAD X , 23.1 , 24.1 , allegro x , Schematic

Digital Design

Digital Design Highlights - New Training Releases, Blogs, Videos and Digital Badges…

With another year gone, we look back at our most popular blogs from the year and…

• 4 min read
digital badge , blended training , artificial intelligence , Genus , modus , accelerated learning , cerebrus , RTL-to-GDSII , webinar , training bytes , Digital Implementation , Innovus , certus , cadence learning and support

Analog/Custom Design

Broadcom Applies Spectre FMC for Timing Variation Analysis

Process variations and device mismatches profoundly affect the latest ultra-small…

• 3 min read
featured , process variations , Spectre FMC Analysis , Monte Carlo analysis , Spectre Fast Monte Carlo , Timing Variation Analysis , Custom IC Design , Non-Gaussian Distribution

Corporate News

Semidynamics – Customizable RISC-V Technology for the Next Five AI Revolutions

It takes about three years to design a chip. At the same time, there’s a revolution…

• 2 min read
designed with cadence , xcelium , AI

System, PCB, & Package Design 

Join Cadence at DesignCon 2025 – Accelerate System Design with Cadence.AI

Are you ready to simplify your workflows, tackle your design challenges with confidence…

• 2 min read
PCB , DesignCon , IC Packaging , Advanced IC packaging

Computational Fluid Dynamics

Women in CFD with Marina Ntipteni

In this edition of the Women in CFD series, we have the pleasure of featuring Marina…

• 5 min read
CFD , women empowerment , WomenAtCadence , women in engineering , Women in CFD

System, PCB, & Package Design 

Designing High-Performance Sensor Packages to Ensure Optimized Performance

In an era where technology and connectivity reign supreme, electronic, and mechanical…

• 4 min read
featured , IC Packaging , Allegro X Design Platform , EDA , MCAD-ECAD , CAD

Computational Fluid Dynamics

Modeling Lift Prediction in High-Lift Aircraft Configurations

A noteworthy case study on the Common Research Model high lift (CRM-HL) configuration…

• 3 min read
CFD , Aerospace , RANS , Pointwise , Cadence Fidelity , CRM-HL , LES

Verification

Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)

USB Promoter Group has released the eUSB2® Version 2.0 specification (eUSB2v2) in…

• less than a min read
Verification IP , eUSB2v2 , featured , Functional Verification , USB , eUSB , eUSB2

System, PCB, & Package Design 

Machine Learning Is Revolutionizing IBIS-AMI Optimization in High-Speed Design

The complexity of IBIS-AMI models used in simulating serial links has increased to…

• 1 min read
featured

System, PCB, & Package Design 

BoardSurfers: How Many Test Points are Enough for Effective In-Circuit Testing?

Many PCB engineers have nightmares about retrofitting test point pads into their…

• 9 min read
Allgero X , Test Points , PCB design , Allegro PCB Editor

Verification

AMBA LTI Verification IP for Arm System MMU

The AMBA LTI (Local Translation Interface) defines the point-to-point protocol between…

• 2 min read
amba5 , Verification IP , featured , Address translation , LTI , SMMU , AMBA , DTI , ARM
CDNS - Fix Layout Hompage