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Cadence Certifies AI-Driven Reference Flows for Intel 18A-P and Intel 14A

The expanded Cadence-Intel Foundry collaboration delivers silicon-proven digital…

Corporate
• 3 min read
DAC , Design IP , featured , DAC 2026 , AI-Driven Design

Corporate News

The Autonomous Chip-to-System Engineer Has Arrived

How Cadence, in collaboration with NVIDIA, is building the industry's first silicon…

Corporate
• 4 min read
AuraStack AI Super Agent , DAC , featured , agentic ai , NVIDIA

Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent

Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 8 min read
chip , featured , AI infrastructure , agentic ai , packaging
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

Programming Early Computers Was Very Different from Today

In my post "I Couldn't Imagine Being Too Poor for Servants, or Rich Enough for a…

• 10 min read
ibm 1130 , atlas II , icl 1904 , ict 1904 , history

Digital Design

Verifying Design Changes Does Not Have to be Difficult and Tedious — Make it Easier…

You put your design through a multitude of tools for various transformations. Going…

FormerMember • less than a min read
conformal , formal , Logic Design , Equivalence Checking , Digital Implementation , verification

Breakfast Bytes

Benedict Evans on Tech 2021: Harder Problems and Regulation

This is a continuation of last week's post Benedict Evans' on Tech in 2021 . That…

• 6 min read
benedict evans , Internet , regulation

SoC and IP

First Look: Cadence Subsystem SoC for PCIe 5.0

If a picture is worth a thousand words, a video tells you the entire story. Cadence…

• 1 min read
controller IP , CXL , PCI Express 5.0 , Design IP , IP , PHY , Gen5 , PCIe , semiconductor IP , Design and Verification IP , SerDes , Compute Express Link , SerDes IP , PCI Express

定制IC芯片设计

Virtuoso Video Diary: “Training bytes” 助推知识传播—第4部分

我们生活在一个日趋复杂的世界中，尽可能的使用和组合各种工具及平台，以及其它的可用功能，这对于我们而言至关重要. 在此博客中， 我们将介绍如何使用Spectre Simulation…

• 2 min read
Chinese blog , Virtuoso , Spectre , Online Support

System, PCB, & Package Design 

BoardSurfers: Training Insights: Setting Up and Using Pin Delays in Constraint M…

Pin delays are used to specify the time delay or length from the internal package…

• 2 min read
17.4 , cadence , BoardSurfers , Cadence Online Support , Constraint Manager , 17.4-2019 , Training Insights , Allegro PCB Editor

System, PCB, & Package Design 

Sigrity and Systems Analysis 2021.1 HF1 Release Now Available

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2021.1 HF1 release is now available…

• 4 min read
Sigrity and Systems Analysis , Celsius Thermal Solver , Simplified Model , 2D Probes , External Heat Sink , ECXML Export , BNP Viewer , 3D Probes , Clarity 3D Solver , Clarity 3D Workbench , DC Refinement , Cloud Simulation

Breakfast Bytes

NUMECA, Computational Fluid Dynamics...and the America's Cup

What is computational fluid dynamics, or CFD? And what does that have to do with…

• 6 min read
CFD , Computational Fluid Dynamics , america's cup , NUMECA

SoC and IP

Taking the Wraps Off: Cadence IP Subsystem for PCIe 5.0

Cadence was the first IP provider to bring controllers for PCI Express (PCIe) 3.0…

• 2 min read
controller IP , CXL , PCI Express 5.0 , Design IP , IP , PHY , Gen5 , PCIe , semiconductor IP , Design IP and Verification IP , SerDes , Compute Express Link , SerDes IP , PCI , PCI Express

Breakfast Bytes

"Targeting" the Open Compute Project

Target (yes, that Target, the retailer) has an infrastructure and cloud conference…

• 3 min read
open compute project , OCP

Breakfast Bytes

Sunday Brunch Video for 11th April 2021

https://youtu.be/D29rGqkkf80 Made in "Hawaii" (camera Ziyue Zhang) Monday: Dynamic…

• less than a min read
sunday brunch

Breakfast Bytes

Have You Heard of ISO 21434? You Will

You probably already know what ISO 26262 is. If you don't, then you can find out…

• 4 min read
Automotive , iso 21434 , ISO 26262

PCB設計／ICパッケージ設計

Allegro System Capture のやり方で設計する

ロジック設計エンジニアのためのシリーズ 洗練された新しい設計エコシステム、Allegro® System Captureの世界へようこそ。この ASCENT シリーズでは…

• less than a min read
17.4 , 17.4-2019 , Allegro System Capture , japanese blog

Analog/Custom Design

Virtuoso Video Diary: Knowledge Booster - 5G mmWave Handset System Design

In this blog we would like to let you know – amongst other things - how to implement…

• 3 min read
training , Cadence training , digital badges , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , Custom IC Design , online training , Custom IC

カスタムIC／ミックスシグナル

Virtuoso Video Diary: Virtuoso Visualization and Analysis XLのTabular Graph

読者の皆様、こんにちは。 今回は、Virtuoso Visualization and Analysis XLのエキサイティングな機能であるTabular Graphについてご紹介したいと思います…

• less than a min read
Analog Design Environment , ViVa-XL , custom/analog , ADE Explorer , Analog Simulation , ADE , Virtuoso , ViVA , Virtuosity , japanese blog , Custom IC Design , ADE Assembler

Breakfast Bytes

Cadence/Samsung Automotive Reference Flow

Today, Cadence and Samsung announced the availability of an Automotive Reference…

• 6 min read
Automotive , Genus , functional safety , Safety , Samsung , samsung foundry , Innovus , fusa , reliability

Breakfast Bytes

Benedict Evans on Tech in 2021

Benedict Evans used to work in Silicon Valley for Andreesen-Horowitz (a16z) but he…

• 6 min read
benedict evans , Internet

System, PCB, & Package Design 

BoardSurfers: Installation Know-How: Using Third-Party Tools with Cadence OrCAD and…

The add-on model is applicable everywhere! You can choose a basic version of the…

• 5 min read
Installation Know-How , 17.4 , cadence , install , BoardSurfers , Allegro OrCAD Installer , 17.4-2019 , Download Manager , OrCAD , Allegro

Breakfast Bytes

Gall's Law and Big Ball of Mud

Gall's Law says: A complex system that works is invariably found to have evolved…

• 4 min read
design patterns , software development
CDNS - Fix Layout Hompage