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The Cadence Quantus Smart View is the next generation of the Extracted View in the…

Arja H 21 Feb 2019 • 4 min read

Smart View , PAD , ICADVM18.1 , ADE Explorer , Virtuoso , Virtuosity , Quantus , IC6.1.8 , parasitics , ADE Assembler , Virtuoso Layout Suite XL

Breakfast Bytes

Who Is Green Hills?

Cadence announced during their recent quarterly earnings announcement and call that…

Paul McLellan 21 Feb 2019 • 5 min read

vast systems technology , Integrity , embedded software , Green Hills , Virtutech

Digital Design

Pattern Technology Applied to Machine Learning-based Hotspot Prediction

I have been working on DFM solutions for (too) many years and the objective hasn…

Philippe Hurat 20 Feb 2019 • 1 min read

pattern analysis , machine learning , silicon learning , signoff , yield , design for manufacturing , DFM

Whiteboard Wednesdays

Whiteboard Wednesdays - An Introduction to IC Test and Modus

In this week's Whiteboard Wednesdays video, distinguished Engineer Rohit Kapur introduces…

References4U 20 Feb 2019 • less than a min read

DFT , Whiteboard Wednesdays , modus , Test

Breakfast Bytes

Ronto and Quecto Are Not Cheeses

The International Bureau of Weights and Measures (its initials are BIPM because it…

Paul McLellan 20 Feb 2019 • 5 min read

ronna , ronto , quecca , quecto , bipm

PCB、IC封装：设计与仿真分析

什么是COM/JCOM信道合规技术

在当今这个数以十计/两位数Gbps的数据时代里，工程师的工作越来越不容易，正确地设计并表征系统以符合不断刷新的业内标准搞得大家焦头烂额，不仅要对高速串行链路及其所有损耗进行仿真…

Sigrity 19 Feb 2019 • less than a min read

JCOM信道合规 , SI , Chinese blog , 设计合规 , JCOM , COM/JCOM , COM , 中文 , Sigrity , Channel Operating Margin(COM) , SystemSI , 信号完整性 , 通道裕量

System, PCB, & Package Design

Take a lesson from the Amish...

“Time to design completion” is almost always the primary metric and the cause for…

BillAcito 19 Feb 2019 • 1 min read

collaboration , SiP , packaging , Symphony , IC package design

Breakfast Bytes

Breakfast Buffet for January 2019

https://youtu.be/4N5bx3eR_9U The three highlighted posts for January were: Breakfast…

Paul McLellan 19 Feb 2019 • less than a min read

predictions , deep learning , alphazero , persistent memory

Breakfast Bytes

All the Ps: the Photonics PDK Panel

At DesignCon at the end of January, there was a panel on photonics. The title was…

Paul McLellan 19 Feb 2019 • 7 min read

Lumerical , silicon photonics , photonics

Breakfast Bytes

Sunday Brunch Video for 17th February 2019

https://youtu.be/ZuoAfBXsbGw Made in front of the green screen (camera Sean) Monday…

Paul McLellan 17 Feb 2019 • less than a min read

MWC , mwc barcelona , DVcon , SPIE , Embedded World , embeddedworld

Breakfast Bytes

Presidents' Day Off-Topic: Why You Can't Say "Red Little Riding Hood"

Monday is Presidents' Day, and Cadence (in the US) will be off for the day. Breakfast…

Paul McLellan 15 Feb 2019 • 6 min read

spelling , off topic , language

Computational Fluid Dynamics

ENTECHMACH: Multidisciplinary Design Optimization of a Multi-Stage Centrifugal C…

Authors: Vladimir Neverov, Ivan Cheglakov, Specialists on compressor machines, Aleksandr…

AnneMarie CFD 15 Feb 2019 • 4 min read

Analog/Custom Design

Virtuosity: In-design Electromigration Analysis - An efficient way to make layouts…

Shrinking size of ICs with highly complex layouts containing billions of transistors…

NamrataM 14 Feb 2019 • 4 min read

electromigration , ICADV12.3 , ICADVM18.1 , EM/IR , Layout Suite , IC6.1.7 , EM , electrically-aware design , IR drop , IC6.1.8

Breakfast Bytes

Embedded in Nuremberg

The last week of February is Embedded World (or, in fact, embeddedworld since they…

Paul McLellan 14 Feb 2019 • 3 min read

Automotive , Nuremberg , Embedded World

Breakfast Bytes

MWC Barcelona: 5G in Catalonia

The last week of February is MWC Barcelona, formerly known as Mobile World Congress…

Paul McLellan 13 Feb 2019 • 4 min read

5G , Mobile World Congress , MWC , mwc barcelona , mobile

Breakfast Bytes

DVCon Preview: The Year of PSS

The biggest conference on verification is DVCon, which takes place in the San Jose…

Paul McLellan 12 Feb 2019 • 3 min read

Perspec , formal , Protium , Palladium , Emulation , DVcon , data-driven verification , xcelium , pss , JasperGold , verification

Breakfast Bytes

SPIE 2019: Light Entertainment

SPIE is the international society for optics and photonics, with the purpose of …

Paul McLellan 11 Feb 2019 • 4 min read

lithography , SPIE , EUV

Breakfast Bytes

Sunday Brunch Video for 10th February 2019

https://youtu.be/evsNzak23b4 Made at Cadence basketball court (camera Sean) Monday…

Paul McLellan 10 Feb 2019 • less than a min read

crypto , DesignCon , persistent memories , emerging memories , darpa

PCB、IC封装：设计与仿真分析

机械、热、SI、PI 、EMI分析：PCB设计缺一不可

本文翻译自Cadence "Breakfast Bytes" 专栏作者Paul McLellan文章 "Mechanical, Thermal, EMI, SI…

SDA China 8 Feb 2019 • less than a min read

SI , Chinese blog , 热分析 , EMI , 机械设计 , PCB设计 , 中文 , Sigrity , 信号完整性 , Allegro

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