Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Verification

Building Efficient Scoreboards

A “scoreboard” is a verification component that checks the data sent to the DUT against…

• 7 min read

Breakfast Bytes

"Interoperability is the Only Way to Prove Standards Compliance"

At the recent TSMC Technology Symposium, Cadence and Mellanox demonstrated multi…

• 3 min read
pcie 4.0 , data center , PHY , mellanox , PCIe , mobile , PCI Express

Breakfast Bytes

Memory in China: XMC

Yesterday I covered the first half of the CASPA meeting last Saturday about memory…

• 4 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

Verification

RTL Signoff vs. Functional Signoff

The notion of signoff has many layers to it, both in terms of complexity but also…

• 4 min read
funtional verification , IMC , metric driven verification (MDV) , functional coverage , MDV , vManager

Breakfast Bytes

Memory, the Turning Point of Chinese Semiconductor Industry

I can't keep away from work. Saturday found me in the Cadence auditorium for the…

• 5 min read
China , Memory , xmc , NAND flash , 3d nand flash , DRAM , caspa , goldman sachs , ibs

Breakfast Bytes

TI and UI: Texas Instruments' Experience with the Common User Interface

Cadence's tools Genus, Innovus, and Tempus have a lot of functionality in common…

• 3 min read
Genus , Tempus , Joules , Voltus , Innovus , Bob Sussman , Texas Instruments , TI , Breakfast Bytes , common UI

Whiteboard Wednesdays

Whiteboard Wednesdays - Common Infrastructure Between Simulation VIP and Accelerated…

In this week's Whiteboard Wednesdays video, Arindam Guha discusses the common infrastructure…

• less than a min read
accelerated VIP , Verification IP , simulation VIP , simulation

Academic Network

Cadence Participates in 14 Spring Career Fairs

Rain or snow does not stop our Cadence employees from being the perfect brand ambassadors…

• 1 min read
university , Cadence Academic Network , campus recruitment , academia

System, PCB, & Package Design 

What's Good About the latest RF PCB? New capabilities in 16.6-2015!

The 16.6-2015 RF PCB release contains many new features and updates. Read on for…

• 4 min read
RF , Cadence Design Systems , 16.6 , SPB , Grzenia , Allegro

Breakfast Bytes

Qualcomm Looks to the Future: Steve Mollenkopf's CDNLive Keynote

Steve Mollenkopf, the CEO of Qualcomm Incorporated, gave one of the keynotes at CDNLive…

• 4 min read
mollenkopf , CDNLive , IoT , Qualcomm , Internet of Things , drone , mobile , Snapdragon , CDNLive Silicon Valley , ARM , datacenter , Breakfast Bytes

Verification

Modelling a Value Holder Template with the Value “new-ed” by Default

In many companies, there is a well-defined flow for handling monitored data items…

• 2 min read
IEEE 1647 , Specman , tech tips , e , e language , specman elite , Aspect Oriented Programming , AOP , verification

Breakfast Bytes

Jim Hogan and the Early Days of Virtuoso

I had lunch with Jim last week to get a little color on the early days of the Virtuoso…

• 3 min read
Hogan , james spoto , national , Virtuoso , daisy systems , chipmaster , Jim Hogan , SDA , SKILL

Academic Network

Announcement of MEMS Design Contest at DATE

On March 17 th in the Exhibition Theatre at DATE, there was the first public announcement…

• 3 min read
Cadence Academic Network , academia , MEMS Design Contest

Breakfast Bytes

AdaptIP Talk About Their High-Level Synthesis Approach at CDNLive

At this year's CDNLive, AdaptIP presented their experiences with high-level synthesis…

• 4 min read
802.11ah , CDNLive , adaptip , Stratus , viterbi decoder , high level synthesis , CDNLive Silicon Valley , FFT , HLS , Breakfast Bytes

Analog/Custom Design

Virtuosity: Things I Learned in January, February, and March 2016 by Browsing Cadence…

At CDNLive Silicon Valley this month, Cadence announced a new family of ADE tools…

• 6 min read
verifier , Explorer , Advanced Node , ADE , modgens , Assembler , VLS XL

Academic Network

What Are Rapid Adoption Kits, And Why Are They Great for Academia?

Academic research often requires the learning of new concepts and techniques in a…

• 1 min read
Cadence Academic Network

Breakfast Bytes

Tom Beckley's CDNLive Keynote: Addressing Complexity and Safety Challenges

Tom Beckley gave the final keynote before lunch here at CDNLive in Silicon Valley…

• 3 min read
Virtuoso Variation Option , Virtuoso ADE Verifier , Tom Beckley , CDNLive , CDNLive Silicon Valley 2016 , Virtuoso , CDNLive Silicon Valley , Virtuoso ADE Explorer , Virtuoso ADE Assembler , Breakfast Bytes

Breakfast Bytes

Mobile Unleashed...and Reviewed

I finished reading Don Dingee and Dan Nenni's book, Mobile Unleashed, the Origin…

• 5 min read
Apple , Simon Segars , Samsung , Qualcomm , mobile , ARM processors , ARM

Whiteboard Wednesdays

Whiteboard Wednesdays—Relationships Between USB Specs

In this week's Whiteboard Wednesdays video, Jacek Duda describes the relationships…

• less than a min read
USB Power Delivery , Whiteboard Wednesdays , IP , USB Type-C , Jacek Duda , USB , USB-C , USB 3.1
CDNS - Fix Layout Hompage