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Corporate News

Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology

Delivering the next wave of chiplet innovation, Cadence has successfully taped out…

Corporate
Corporate 17 Dec 2025 • 2 min read
news story , ucie , featured , chiplets , TSMC N3P

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
Cadence Japan 15 Dec 2025 • less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP(Verification IP:VIP)を発表しました。今回発表されたVIPは…

Cadence Japan
Cadence Japan 4 Dec 2025 • less than a min read
news story , Verification IP , featured
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Blog - Post List
Latest blogs

Breakfast Bytes

How Did Cadence Get to Be Good in Analog?

We recently held the annual Mixed Signal Technology Summit. I blogged about it and…

Paul McLellan 5 Nov 2015 • 4 min read
cadence , diva , composer , analog , Virtuoso , analog mixed signal , OpenAccess

Whiteboard Wednesdays

Whiteboard Wednesdays—Automotive Functional Safety and Reliability Requirements

In this week’s Whiteboard Wednesday, Charles Qi talks about automotive functional…

References4U 4 Nov 2015 • less than a min read
Automotive , Whiteboard Wednesdays , IP , functional safety , software , reliability

Breakfast Bytes

This Year's Phil Kaufman Award Recipient: Wally Rhines

This year's Phil Kaufman award recipient is Wally Rhines. I already knew the big…

Paul McLellan 4 Nov 2015 • 4 min read
DSP , ti320 , Wally Rhines , walden rhines , Mentor Graphics , Kaufman Award , Texas Instruments , Breakfast Bytes , phil kaufman award , Mentor

Breakfast Bytes

The Phil Kaufman Award Dinner Is Later this Month. Who Was Phil Kaufman?

Every year one person in EDA is honored with the Phil Kaufman Award. As it says on…

Paul McLellan 3 Nov 2015 • 4 min read
SCS , cadence , silicon compilers , sci , Quickturn , Phil Kaufman , Breakfast Bytes , phil kaufman award

Breakfast Bytes

Ten Years Ago Self-Driving Cars Couldn't Go Ten Miles

Recently Tesla activated Autopilot for their vehicles, which are equipped with the…

Paul McLellan 2 Nov 2015 • 3 min read
delphi , darpa grand challenge , Stanford , autonomous vehicle , cmu , google , tesla , self-driving car , Breakfast Bytes

Breakfast Bytes

Mixed-Signal Symposium: Mixed Means More Digital

Earlier this week was the Cadence Mixed-Signal Technology Summit. Since I was the…

Paul McLellan 30 Oct 2015 • 5 min read
Berkeley , analog , Mixed-Signal Technology Summit , mixed signal , analog mixed signal , Breakfast Bytes

System, PCB, & Package Design 

What's Good About Cadence PCB Design and SI/PI Analysis Products? The 16.6 release…

I’m taking a brief detour from the usual product technical details this week to mention…

Jerry GenPart 29 Oct 2015 • 2 min read
PCB , IC Packaging and SiP Design , Cadence Design Systems , SiP , Allegro 16.6 , Design Entry CIS , DEHDL , FPGA System Planner , High Speed , Allegro Design Workbench , PSPICE , SPB , PCB Editor , High-Density Interconnect , Constraint Manager , Design Entry HDL , Layout , OrCAD , PCB design , AMS simulation , Grzenia , Allegro PCB Editor , ConceptHDL , Allegro

Breakfast Bytes

Is it Hot? Ask Joules

Ever since Pat Gelsinger, then CTO of Intel, shocked everyone with his power graphs…

Paul McLellan 29 Oct 2015 • 5 min read
Low Power , RTL , Joules , power , Breakfast Bytes , joules rtl power solution

Breakfast Bytes

The Consolidator Makes a Rare Public Appearance: Hock Tan's Top Ten List

On Saturday I attended the Chinese American Semiconductor Professional Association…

Paul McLellan 28 Oct 2015 • 5 min read
forecast , Avago , consolidator , broadcom , hock tan , caspa , consolidation , lsi logic

Whiteboard Wednesdays

Whiteboard Wednesdays—MIPI Protocol Trends

In this week's Whiteboard Wednesdays video, Moshik Rubin takes a closer look at the…

References4U 27 Oct 2015 • less than a min read
Whiteboard Wednesdays , IP , MIPI , MIPI protocols

Breakfast Bytes

IEEE Computer Society: Automotive Cybersecurity

On the third Thursday of each month the IEEE Computer Society of Silicon Valley has…

Paul McLellan 27 Oct 2015 • 5 min read
security , Automotive , IEEE , Breakfast Bytes

Breakfast Bytes

Emulation: the Key to Virtual Platforms

Between about 2000 and 2010, there were a number of startup companies that attempted…

Paul McLellan 26 Oct 2015 • 5 min read
virtual platforms , RTL , Palladium , Emulation

Breakfast Bytes

Weekly News—October 23rd 2015

ARM Acquires Carbon ARM announced that it had acquired Carbon Design Systems.…

Paul McLellan 23 Oct 2015 • 3 min read
Western Digital , SanDisk , IoT , KLA-Tencor , Lam Research , ARM , semiconductors

Life at Cadence

Cadence Is the #21 World’s Best Workplace!

We are honored to be named #21 on FORTUNE’s list of the Best Global Companies to…

llightbody 23 Oct 2015 • 1 min read
World's Best , Culture , Community , innovation , cadence , Fortune , GPTW , Fortune 100 best companies to work for , great place to work

Breakfast Bytes

Lawyers, Guns, and Money: An Evening with EDAC on Patents

Next Thursday, October 29, 2015, the Electronic Design Automation Consortium (EDAC…

Paul McLellan 23 Oct 2015 • 5 min read
VLSI , US Patent and Trademark Office , USPTOSV , EDAC , patents , patent litigation , Breakfast Bytes

Analog/Custom Design

Virtuosity: Things I Learned in June and July 2015 by Browsing Cadence Online Su…

Cadence Online Support Release Highlights July 2015 Some nice enhancements to…

stacyw 22 Oct 2015 • 7 min read
Analog Design Environment , ADE XL , Spectre , PVS , Custom IC Design , ICRP , Virtuoso Layout Suite XL

Breakfast Bytes

How Is Google So Good at Recognizing Cats?

Convolutional Neural Networks (CNNs) are a key technique for image recognition. As…

Paul McLellan 22 Oct 2015 • 3 min read
performance , Low Power , Tensilica , convolutional neural nets , neural networks , CNN , power , neural nets , image recognition , Breakfast Bytes

Analog/Custom Design

Virtuosity: Things I Learned in August and September 2015 by Browsing Cadence Online…

Cadence Online Support Features Setting the Release Preferences for your search…

stacyw 21 Oct 2015 • 5 min read
AMS , ADE , spectreRF , Liberate , PVS , Custom IC Design , XLME

Digital Design

Performance, Power, Area. It's All You Need to Know—or Is It?

Whether it's in a technical paper, a pundit's article, or a live discussion with…

BrettCline 21 Oct 2015 • 2 min read
High-Level Synthesis , PPA , Stratus , SystemC , HLS
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