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Breakfast Bytes: Automotive Supply Chains

Paul McLellan

I'm sure you've heard that there are lots of supply chain issues. Container ships stacked up outside Los Angeles and Long Beach ports. A shortage of truck drivers. Empty containers all on the wrong side of the Pacific. But generally speaking,...
- 6 Dec 2021
Spotlight Taiwan: Cadence Sigrity X獲選亞洲金選獎(EE Awards Asia)年度EDA最佳產品獎

candyyu

Cadence Sigrity X日前獲選為2021年亞洲金選獎(EE Awards Asia) EDA/IP組別台灣區與亞洲區年度最佳產品獎(Best Product of the Year)。亞洲金選獎頒獎典禮於11月16日(二)舉行。Cadence益華電腦總經理宋栢安出席盛會，並代表Cadence接受此項殊榮。由電子工程專輯(EE Times)、電子技術設計(EDN)專業技術媒體及亞洲網站用戶共同評選的亞洲金選獎，每年表彰對電子創新與發展做出重要貢獻的產品技術解決方案。Sigrity...
- 5 Dec 2021
Spotlight Taiwan: 超越摩爾定律 Cadence以Cerebrus與Integrity 3D-IC擘劃新局

candyyu

Cadence『智慧系統設計』的策略方向下聚焦數位全流程的創新 – 今年推出驅動晶片設計及晶片尺寸未來的『Cerebrus智慧晶片設計工具』及『Integrity 3D-IC設計平台』。Cadence資深副總裁暨數位與簽核事業群總經理滕晉慶博士日前特別受邀越洋媒體團訪，除了分享產業觀點，並介紹這兩款今年推出的全新數位設計產品，剖析其優勢及研發進程。Cadence台灣區總經理宋栢安以及Cadence 3DIC研發處長賴旺霆也共同出席訪談，對產業最新趨勢進行交流。 ...
- 5 Dec 2021
Breakfast Bytes: Sunday Brunch Video for 5th December 2021

Paul McLellan

https://youtu.be/MPbxTioQ2EI Made in Rancho San Antonio Open Space Preserver (camera Carey) Monday: Webinar: Signoff Billion Gates Designs in the Cloud with Cadence, TSMC, and Microsoft Tuesday: 6th Annual Photonics Summit Coming in December Wed...
- 5 Dec 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

Hard to believe it's already December and 11/12ths of a year's worth of CFD is behind us. And with the holidays looming, it's uncertain how many more editions of This Week in CFD are ahead of us. As my Zen friends would say, do not replay...
- 3 Dec 2021
Breakfast Bytes: DAC Preview

Paul McLellan

The annual Design Automation Conference (DAC) is coming up December 5th to 9th, next week. It is in-person in San Francisco's Moscone Center West. It will be available virtually from December 13th until January 1st. To attend in person, you must be f...
- 3 Dec 2021
System, PCB, & Package Design : ASCENT: Managing Designs with Evolving Libraries

Gunjan Goel

Components, or parts, are the basic building blocks of a PCB design. It is of utmost importance that the components present in the design, their graphics, electrical, and part definitions, match the latest and updated li...
- 3 Dec 2021
Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 12 - Using Quview and Connectivity Checker in Quantus

Parula

This blog shows how Quantus Geometry Viewer (Quview) can be used to view various geometries like 3d views of an area generated by Quantus for debugging purposes. In addition, it shows the Connectivity checker which is is a netlist comparison utility to check the connectivity of the Quantus output netlist against the incoming LVS netlist data.
- 2 Dec 2021
Life at Cadence: Commemorating Our Veterans During Veterans Day

Mary Kasik

Creating an environment of respect and appreciation for one another is a core element of Cadence’s culture. On Veterans Day, and all month long, we showed our gratitude for our Veteran employees, their families, our Veteran friends, and all Vet...
- 2 Dec 2021
Breakfast Bytes: November Update: Automotive, Graviton 3, Images, New Fab, and More

Paul McLellan

Because of the Thanksgiving break (and me taking the whole week off), I skipped the regular November Update post, but suddenly there is so much semiconductor news that I'm doing it out of band today even though it is already December. Samsung Fab The...
- 2 Dec 2021
Computational Fluid Dynamics: Unsteady Simulation Of Hydraulic Turbines, Vortex Cores Display And Much More In Omnis Version 5.2

AnneMarie CFD

The newest release of the Cadence Omnis CFD environment is available now and brings better project and file management, more geometry repair tools, multi-block structured meshing and faster Turbo and Open solvers, to name but a few of the advant...
- 2 Dec 2021
System, PCB, & Package Design : System Analysis Knowledge Bytes: SPEEDEM Gets a New Home in Layout Workbench

Shreyansh

Sigrity SPEEDEM technology is uniquely equipped to let you perform a broad range of analysis tasks from a single tool—including interconnect model extraction, signal integrity (SI) and power integrity (PI) studies, and design-stage electromagnetic interference analysis. This blog introduces the updates and enhancements made in Sigrity SPEEDEM in the Sigrity and Systems Analysis 2021.1 HF3 release.
- 2 Dec 2021
System, PCB, & Package Design : Sigrity and Systems Analysis 2021.1 HF4 Release Now Available

SigrityReleaseTeam

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2021.1 HF4 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 2021.1 HF4 release, see the README.txt file in the installation hierarchy.
- 2 Dec 2021
Computational Fluid Dynamics: Automate Mesh Generation Workflow for Complex Geometries using Cadence Pointwise

Veena Parthan

Nick Wyman, Software Engineering Director at Cadence and an Associate Fellow of the American Institute of Aeronautics and Astronautics (AIAA), presented a paper where he talks about the different meshing technologies to capture and refine the critica...
- 1 Dec 2021
定制IC芯片设计 : 高精度的电磁分层建模

Claudia Roesch

当下5G、汽车电子和物联网日益增长的市场需求，加快了半导体技术和集成电路的发展。特别是先进CMOS工艺和锗化硅（SiGe）双极器件的高截止频率，使得利用较低的掩模成本实现高频性能和高集成度的毫米波电路成为可能。
- 1 Dec 2021
Breakfast Bytes: Today Is the 40th Anniversary of the BBC Micro...and the Ancestry of Arm

Paul McLellan

Today is the 40th anniversary of the release of the BBC Micro. It was released on 1st December 1981. It was designed and manufactured by Acorn Computer in Cambridge. The BBC is the British Broadcasting Corporation, which launched a computer literacy ...
- 1 Dec 2021
カスタムIC／ミックスシグナル: CadenceLIVEや各種ウェビナーをオンデマンドでご覧いただけます！

Custom IC Japan

ケイデンスでは、各国で開催されたCadenceLIVE 2021のビデオと資料を、順次 cadence.com に掲載しております。CadenceLIVE Japan 2021についても、ご許可をいただいたビデオと資料を以下のURLに掲載しておりますので、是非ご覧ください: https://www.cadence.com/en_US/home/cadence-live/2021/japan/repository.html ※ ビデオや資料をクリックした時に cadence.com へのログイン画...
- 30 Nov 2021
System, PCB, & Package Design : IC Packagers: Creating and Using Non-Rounded Via Stacks in Package Designs

Sanjiv Bhatia

The demand for smaller electronics devices can be achieved by high-density layers in multi-layer build-up substrates or multi-layered printed circuit boards (PCB). Vias are essential in the design and manufacturing process of multi-layered packages ...
- 30 Nov 2021
Breakfast Bytes: 6th Annual Photonics Summit Coming in December

Paul McLellan

I was planning to publish this post on Diwali, the annual Indian festival of lights, but that was a bit too cute and it never happened. The 6th annual Photonics Summit is on December 7 and 8. It will be virtual, and like last year it will be run...
- 30 Nov 2021
Analog/Custom Design: Virtuoso Video Diary: Usability of the Graph Summary Label in Virtuoso Visualization and Analysis XL Levels Up

Udit Rajput

Read through this blog to know more about the usability enhancements made to the graph summary label in Virtuoso Visualization and Analysis XL.
- 29 Nov 2021
Computational Fluid Dynamics: Last Week in CFD

John Chawner

Because of last week's Thanksgiving holiday here in the U.S. and the company's generosity in giving us not 2 but 3 days of rest and relaxation, last week's CFD news is shared today. And quite a cornucopia it is. The American Institute of...
- 29 Nov 2021
Computational Fluid Dynamics: How to Generate a Quarter Million CFD Meshes Without Trying

John Chawner

Let's face it. Generating meshes for CFD is a necessary evil. Meshing is a means to an end and yet is said to require 75% of an engineer's time. NASA's CFD Vision 2030 Study called most CFD processes "onerous" and cited meshing&...
- 29 Nov 2021
Breakfast Bytes: Webinar: Signoff Billion-Gate Designs in the Cloud with Cadence, TSMC, and Microsoft

Paul McLellan

Cadence, TSMC, and Microsoft are presenting a joint webinar on December 2 (in a couple of days' time). The title is Beat Your Signoff Schedule! How to Sign Off a 10 Billion+ Transistor Design in the Cloud, and the presenters are: Vivian Jang, T...
- 29 Nov 2021
Computational Fluid Dynamics: Introduction to Flashpoint Automatic Volume Meshing in Pointwise

John Chawner

The need for automatic mesh generation has never been clearer. The CFD Vision 2030 Study called most applied CFD “onerous” and cited meshing’s inability to generate complex meshes on the first attempt a roadblock. That’s where...
- 24 Nov 2021
RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environment 回路図/システムダイアグラムのヒントとコツ

RF Design Japan

Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。 AWRソフトウェアのヒントとコツ:回路図およびシステムダイアグラムでのエレメントの配置 A...
- 23 Nov 2021

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