Community

While many electronic design companies can standardize on a single vendor workflow for PCB design, not all can. OLogic, Inc., a Silicon Valley consulting group specializing in robotics, IoT, and consumer electronics, must be flexible in the tools they use to design PCBs because some clients require the use of a specific design tool. At CadenceLIVE 2025, Jasmine Vital…

The semiconductor industry is undergoing a paradigm shift from monolithic system-on-chip (SoC) architectures to modular, chiplet-based designs. This transformation is driven by escalating design complexity, soaring fabrication costs, and the relentless pursuit of efficiency. However, as chiplet adoption accelerates, security becomes a critical concern, requiring robust measures to protect data, intellectual property …

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation (ASTC) and a renowned leader in virtual platforms. The VLAB Works team provides an ultra-high-performance Virtual Development Environment (VDE) and an extensive catalog of virtual fast models.

The addition of this highly talented team and technology builds upon the existing multi-year Cadence and ASTC partnership, which integrated…

PCB design teams are often caught in a repetitive cycle of design and simulation with multiple iterations to meet PCB design constraints. At CadenceLIVE Silicon Valley 2025, Cadence customers Priya Boopalan of ZF, a global technology company supplying advanced mobility products and systems for passenger cars, commercial vehicles and industrial technology, and Gopichandran Annadurai of Formfactor Inc., a leading provider…

As we move through 2025, the momentum generated by Cadence continues to energize the PCIe ecosystem. At the 2025 PCI-SIG Developer's Conference in Santa Clara, CA, Cadence delivered a commanding presence with industry-first demonstrations, deep technical insights, and a complete IP solution for PCIe 7.0 tailored for the demands of HPC and AI.

Cadence demonstrated a stable and high-performance…

As the electronic design automation (EDA) landscape continues to evolve, the importance of efficient and effective synthesis has grown exponentially. With the increasing complexity of modern system-on-chips (SoCs), design teams face significant challenges in achieving optimal power, performance, and area (PPA) results. In this context, the Cadence Genus Synthesis Solution has emerged as a game-changer, helping designers…

Cadence is transforming chip design with the launch of Cadence Cerebrus^® AI Studio, the industry's first agentic AI, multi-block, multi-user design platform. This cutting-edge solution accelerates system-on-chip (SoC) design by 5 – 10X while achieving unparalleled power, performance, and area (PPA) gains. Built to empower engineers with intelligent workflows and advanced data analytics, Cadence Cerebrus AI Studio…

In our previous blog, we discussed the fundamentals of time-of-flight (ToF) technology, including the signal processing requirements for pre-processing and decoding ToF sensor data. We also examined how Tensilica Vision DSPs meet the computational demands while ensuring energy efficiency. In case you missed it, here's the link to the previous post.

Building on that, today we will examine how artificial intelligence…

Cadence is collaborating with Arm on their groundbreaking first-generation compute subsystems (CSS) for automotive, Arm^® Zena^™ CSS. This partnership marks a significant milestone in the automotive industry, enabling the realization of software-defined vehicles (SDVs) as they incorporate more AI-defined features to meet driver demands. Leveraging Zena CSS, combined with Cadence’s automotive chiplet and IP solutions…

In modern IC design, especially with the rise of heterogeneous integration, electromagnetic (EM) analysis is critical for ensuring signal integrity, performance, and reliability. Cadence’s Virtuoso Heterogeneous Integration (Virtuoso HI) platform, combined with the EMX Planar 3D Solver, offers a powerful, layout-aware EM simulation environment directly within the Virtuoso design flow—so you can analyze, optimize…

In today’s high-frequency, high-density design landscape, engineers face a growing challenge: accurately simulating real-world electromagnetic behavior in increasingly complex systems. The answer? Clarity 3D Solver, seamlessly integrated into Cadence AWR Microwave Office.

This powerful combination is redefining how RF and microwave engineers approach 3D EM simulation, making it faster, smarter, and more scalable…