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Latest Blog Posts

  • Every Step a Story: What Trekking Taught Me About Short Steps!

    Digital Design: Every Step a Story: What Trekking Taught Me About Short Steps!

    P Saisrinivas
    P Saisrinivas

    I recently went on a trek to the largest monolithic hill in Asia, and it was my first ever trek in my life.

    When I started the trek, I was filled with excitement and confidence. The fresh air, beautiful mountains, and natural sounds energized me. I felt prepared both mentally and physically. Like many, I expected the journey to be challenging but manageable. However, seeing the large hill from below frightened me, but…

    • 11 Mar 2026
  • Powering the AI Supercycle: Design for AI and AI for Design

    Corporate News: Powering the AI Supercycle: Design for AI and AI for Design

    Reela Samuel
    Reela Samuel
    At the IEEE International Solid-State Circuits Conference (ISSCC) 2026 in San Francisco, Anirudh Devgan, President and CEO of Cadence, outlined a defining shift for the semiconductor industry: artificial intelligence is transforming not only the syst...
    • 11 Mar 2026
  • Improved Efficiency: Longhorn Racing Transformed Analysis with Cadence Tools

    Academic Network: Improved Efficiency: Longhorn Racing Transformed Analysis with Cadence Tools

    Kira Jones
    Kira Jones
    Longhorn Racing, a cooperative student organization comprised of three Collegiate Design Series Teams that provide its members with the opportunity to explore different engineering fields and grow their tangible skills, is experiencing a significant ...
    • 10 Mar 2026
  • Image Reference: Courtesy of ARM® Debug Interface Architecture Specification ADIv6.0 (Figure B4-1 SWD successful write operation)

    Verification: Serial Wire Debug (SWD) Protocol: Efficient Debug Interface for Arm-Based System

    Divya Chawla
    Divya Chawla
    Modern embedded systems are becoming increasingly compact, power efficient, and feature rich. As SoCs integrate more functionality, developers need reliable debug access without increasing pin count or board complexity. Serial Wire Debug (SWD) addres...
    • 6 Mar 2026
  • embedded world 2026

    SoC and IP: Transforming the Automotive Experience with Cadence Tensilica DSPs

    SriramK
    SriramK
    Experience Innovation at Embedded World 2026

    The automotive industry has shifted its focus from traditional performance metrics to prioritizing safety and comfort. As vehicles evolve into software-defined environments, the interior cabin is emerging as a sanctuary—offering enhanced safety, superior comfort, and immersive high-fidelity entertainment for all occupants. At this year's embedded world, Cadence is…

    • 5 Mar 2026
  • A depiction of optical computing

    Corporate News: Reinventing Optical Computing: Neurophos’ Breakthrough in Photonic Transistors

    Tanushri Shah
    Tanushri Shah
    Optical computing has been around since the late 1980s. The idea of using light instead of electricity has always sounded promising, especially since photons are much more energy-efficient than electrons. When put to the test, though, optical transi...
    • 5 Mar 2026
  • Professionals in CFD: A Conversation with Margarita Campos

    Computational Fluid Dynamics: Professionals in CFD: A Conversation with Margarita Campos

    Veena Parthan
    Veena Parthan
    In this edition of Professionals in CFD, Cadence marketing writer Veena Parthan speaks with Margarita to learn about her dual degrees, rotating detonation engines, her love for her work, and the surprising non-technical career she might have chosen instead.
    • 4 Mar 2026
  • A Seamless Cadence Solution for RF and Microwave Designers

    Learning and Support: A Seamless Cadence Solution for RF and Microwave Designers

    ErinGrant
    ErinGrant
      Next generation wireless systems integrate heterogeneous technologies to meet demanding size, weight, performance and cost (SWaP-C) requirements. To meet these challenging SWaP-C specifications and ensure accurate simulation results for first-...
    • 4 Mar 2026
  • Accelerating Chiplet Innovation with a New Partner Ecosystem

    SoC and IP: Accelerating Chiplet Innovation with a New Partner Ecosystem

    Mick Posner
    Mick Posner

    The semiconductor industry is currently undergoing a massive shift. As we push the boundaries of performance in physical AI, data centers, and high-performance computing (HPC), traditional monolithic chip design is hitting physical and economic walls. The answer for many engineers and architects is chiplets, a modular approach that enables the mixing and matching of silicon dies to create powerful, highly customized…

    • 4 Mar 2026
  • Designing AI Factories with Digital Twins

    Data Center: Designing AI Factories with Digital Twins

    Reela Samuel
    Reela Samuel
    Engineering AI infrastructure as a performance system The role of the data center is changing. What was once built to run applications is now engineered to operate as an AI factory. An AI factory is a purpose-built computing environment designed to ...
    • 2 Mar 2026
  • Cadence's Acquisition of Hexagon D&E: A Game-Changer for Multiphysics Innovation

    System, PCB, & Package Design : Cadence's Acquisition of Hexagon D&E: A Game-Changer for Multiphysics Innovation

    Stephen Smith
    Stephen Smith

    Having spent six rewarding years at Hexagon Design and Engineering (D&E), followed by the last three years in leadership at Cadence, I have watched both organizations push the boundaries of what is possible in design and engineering. This week's announcement that Cadence has acquired Hexagon's D&E business isn't just a corporate milestone for me personally—it represents a massive leap forward for the entire engineering…

    • 2 Mar 2026
  • BETA CAE 2025.1.1 Software Release Available

    Physical Systems Simulation (CAE): BETA CAE 2025.1.1 Software Release Available

    Cadence BETA CAE Software
    Cadence BETA CAE Software
    The BETA CAE team has released its first Hot Fix of 2025.1 for ANSA, EPILYSIS, META, KOMVOS, SPDRM, ANSERS, FATIQ, and RETOMO with critical bug fixes and selected implementations. Known Issues Resolved in ANSA CAD Import / Export ANSA would cease o...
    • 1 Mar 2026
  • How 224G SerDes Unifies Today’s AI Fabrics

    Data Center: How 224G SerDes Unifies Today’s AI Fabrics

    HW202512191014
    HW202512191014
    AI system architects no longer face a binary choice between scale-up and scale-out fabrics. Modern AI platforms require both to be executed efficiently, predictably, and within aggressive schedules. The shift lies in how risk is managed across these ...
    • 27 Feb 2026
  • Automated PCB Constraint Creation and Reuse with Allegro X Constraint Compiler

    Learning and Support: Automated PCB Constraint Creation and Reuse with Allegro X Constraint Compiler

    ErinGrant
    ErinGrant
    Modern PCB designs demand strict electrical, physical, and spacing constraints, especially for high-speed interfaces, such as DDRx, PCIe, SATA, USB3, and complex SoCs. Managing these constraints manually can be time-consuming, error-prone, and incon...
    • 27 Feb 2026
  • The New Engineering Stack: Accelerated Computing and Agentic AI

    Corporate News: The New Engineering Stack: Accelerated Computing and Agentic AI

    Corporate
    Corporate
    Accelerated computing is now the primary design hardware platform for engineering. As electronics, systems, and life sciences challenges grow exponentially in complexity, traditional CPU-centric approaches simply cannot keep pace with the scale, fide...
    • 27 Feb 2026
  • We're Celebrating Black History Month with Our Employees

    Life at Cadence: We're Celebrating Black History Month with Our Employees

    Ryan Robello
    Ryan Robello
    At Cadence, we're recognizing Black History Month by celebrating our employees, amplifying voices, and sharing stories that reflect what brings us together. This month, we're excited to hear from members of our Black Inclusion Group (BIG), who offer ...
    • 27 Feb 2026
  • Cadence and NeoLogic Develop Energy-Efficient, High-Performance Processors

    Corporate News: Cadence and NeoLogic Develop Energy-Efficient, High-Performance Processors

    Corporate
    Corporate
    Cadence recently expanded its collaboration with Israeli company NeoLogic, which develops advanced design technology for high-performance processors. The partnership focuses on creating a new generation of server processors dedicated to AI inference ...
    • 26 Feb 2026
  • Ascent: Migrate DE-HDL & OrCAD X Capture to Allegro X PCB System Capture

    System, PCB, & Package Design : Ascent: Migrate DE-HDL & OrCAD X Capture to Allegro X PCB System Capture

    AsadMakandar
    AsadMakandar
    The electronics design world is moving fast, and teams are starting to feel the limits of their existing schematic workflows with Allegro X Design Entry HDL (DE-HDL) or OrCAD X Capture. As design complexity increases and product cycles shrink, engine...
    • 26 Feb 2026
  • Joules RTL Design Studio: Smarter RTL Design for PPAC Excellence

    Digital Design: Joules RTL Design Studio: Smarter RTL Design for PPAC Excellence

    Udaya Shankar
    Udaya Shankar
    Unlock faster chip development with PPAC-focused RTL design powered by Joules RTL Design Studio. Learn how Joules RTL Design Studio streamlines RTL design for PPAC optimization, delivering smarter workflows and improved chip performance through ...
    • 26 Feb 2026
  • The "EDA" Protein Bar: Compact Nutritious Learning for Billion Transistor World

    Digital Design: The "EDA" Protein Bar: Compact Nutritious Learning for Billion Transistor World

    Neha Joshi
    Neha Joshi

    You're craving clarity—not another 80-page PDF, not another "I'll totally read the manual" promise that expires in 12 minutes flat. You're fascinated by the EDA universe, but your brain is currently running on espresso, hope, and a simulation that almost converged (engineering's most fictional phrase).

    So instead of a full learning buffet, you need something you can grab fast: knowledge…

    • 25 Feb 2026
  • Virtuoso Studio IC25.1 ISR4 Now Available

    Analog/Custom Design: Virtuoso Studio IC25.1 ISR4 Now Available

    KomalJohar
    KomalJohar
    Virtuoso Studio IC25.1 ISR4 production release is now available for download.
    • 25 Feb 2026
  • The New Engineering Stack at NVIDIA GTC 2026

    Corporate News: The New Engineering Stack at NVIDIA GTC 2026

    Corporate
    Corporate
    Together, accelerated computing and agentic AI are redefining both the engine and the interface of modern engineering. This transformation is driven by the deep, ongoing collaboration between Cadence and NVIDIA, combining AI infrastructure and agent...
    • 24 Feb 2026
  • Edge and Micro Data Centers: Powering the Real-Time Digital World

    Data Center: Edge and Micro Data Centers: Powering the Real-Time Digital World

    Reela Samuel
    Reela Samuel
    The modern world no longer runs on delayed responses. It runs on immediacy. When a self-driving vehicle identifies a pedestrian, when a factory robot adjusts production in milliseconds, or when an augmented reality overlay appears instantly during r...
    • 24 Feb 2026
  • Celtro – Making Medical Implants Battery-Free

    Corporate News: Celtro – Making Medical Implants Battery-Free

    Tanushri Shah
    Tanushri Shah
    The average battery in a pacemaker occupies approximately 60 to 80% of its space. Not only does this limit the pacemaker’s placement in the heart, but it also limits its lifespan, leading to secondary replacement surgeries as well as additional...
    • 24 Feb 2026
  • New Year, New (Smarter) You!

    Digital Design: New Year, New (Smarter) You!

    VNelson
    VNelson

    Gallop into the Lunar New Year with faster timing, quieter nets, and fewer headaches!

    The lanterns are up. The snacks are endless. Someone's aunt is asking why you're still debugging timing at midnight. Yes—it's the Lunar New Year, a season of fresh starts, loud celebrations, and wildly optimistic promises like:

    "This year, I will *not* let congestion ruin my life."

    And since we're celebrating…

    • 23 Feb 2026
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