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Featured

System, PCB, & Package Design 

Cadence's Acquisition of Hexagon D&E: A Game-Changer for Multiphysics Innovation

Having spent six rewarding years at Hexagon Design and Engineering (D&E), followed…

Stephen Smith
Stephen Smith 2 Mar 2026 • 2 min read
Cadence Design Systems , featured , Hexagon , market leader , multiphysics

Corporate News

The New Engineering Stack: Accelerated Computing and Agentic AI

Accelerated computing is now the primary design hardware platform for engineering…

Corporate
Corporate 27 Feb 2026 • 3 min read
featured , GTC , NVIDIA

Life at Cadence

We're Celebrating Black History Month with Our Employees

At Cadence, we're recognizing Black History Month by celebrating our employees, amplifying…

Ryan Robello
Ryan Robello 27 Feb 2026 • 3 min read
featured , LifeAtCadence

Analog/Custom Design

Virtuoso Studio IC25.1 ISR4 Now Available

Virtuoso Studio IC25.1 ISR4 production release is now available for download.

KomalJohar
KomalJohar 25 Feb 2026 • 5 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

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  • System, PCB, & Package Design  1006
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Blog - Post List
Latest blogs

中文技术专区

针对GPGPU设计,Cadence RTL到Signoff流程解密

近年来,随着GPU在通用计算领域的高速发展,逐渐将应用范围扩展到图形之外,例如人工智能、深度学习和自动驾驶。这些领域的特点要求GPU在并行处理海量数据的同时提供更高的访存速度和浮点运算能力…

FormerMember 23 Aug 2021 • less than a min read
Glitch power , GPGPU , OCV , 预测布局

System, PCB, & Package Design 

System Analysis Knowledge Bytes: Signal, Power, and Thermal Integrity using Layout…

The System Analysis Knowledge Bytes blog series explores the capabilities and potential…

kmayank 23 Aug 2021 • 4 min read
Celsius Thermal Solver , Help Menu , OptimizePI , Sigrity , Clarity 3D Solver , Layout Workbench , XtractIM , PowerDC , Systems Analysis , PowerSI

Breakfast Bytes

CadenceLIVE: Xilinx's Thunder-Bus

At CadenceLIVE Americas in June, Raghukul presented on Thunder-Bus, a low-latency…

Paul McLellan 23 Aug 2021 • 2 min read
protium x2 , Protium , xilinx

SoC and IP

PCIe for Automotive - DesignCon/DriveWorld 2021

DesignCon 2021, Drive World Conference, and Embedded Systems Conference are a joint…

TomWong 20 Aug 2021 • 3 min read
CXL , Design IP , IP , featured , PCIe Gen4 , ip cores , PCI , PCIe PHY

Academic Network

Academic and Entrepreneur Tracks at CadenceLIVE Europe 2021

CadenceLIVE Europe 2021 will be hosted on October 19th. This year will be a virtual…

Anton Klotz 20 Aug 2021 • 2 min read
Entrepreneur , Cadence Academic Network , Master Thesis Award , cadencelive

Computational Fluid Dynamics

CFD, Cars, and Cadence - Two Events Next Week

The Cadence CFD team is excited about two automotive engineering events next week…

John Chawner 20 Aug 2021 • 1 min read
CFD , Automotive , Pointwise , Computational Fluid Dynamics , CFD Applications , Mesh Generation , Omnis

Breakfast Bytes

Rowhammer: Beating DRAM into Submission

Way back in 2014, a DRAM vulnerability called Rowhammer was revealed. This is a silicon…

Paul McLellan 20 Aug 2021 • 5 min read
security , ddr5 , Memory , DDR4 , JEDEC , DRAM , rowhammer

Life at Cadence

My Life at Cadence: Nick Phillips

People come to Cadence to have meaningful careers, work with some of the brightest…

Lautanen 19 Aug 2021 • less than a min read
Insights on Culture , Culture , cadence , GPTW , my life at cadence , great place to work , cadence emea

Breakfast Bytes

Tensilica ConnX B10 in GF 22FDX for Automotive Grade 1

At CadenceLIVE Americas back in June, GlobalFoundries presented a case study on using…

Paul McLellan 19 Aug 2021 • 4 min read
adaptive body bias , 22fdx , abb , gf , GlobalFoundries , FD-SOI

Breakfast Bytes

BlackHat: Hacking a Capsule Hotel—Ghost in the Bedrooms

Security conferences always seem to have at least one interesting presentation that…

Paul McLellan 18 Aug 2021 • 6 min read
security , blackhat

System, PCB, & Package Design 

ASCENT: Accessing System Capture Functions Through a Browser-Based Dashboard

So, if you are an electronics design program manager or team manager, it’s unlikely…

Auromala 17 Aug 2021 • 2 min read
17.4-2019 , Allegro System Capture , ASCENT , 17.4-QIR3

Breakfast Bytes

Aerospace and Defense Day

At the end of July, Cadence had its CadenceCONNECT Aerospace and Defense Day. For…

Paul McLellan 17 Aug 2021 • 4 min read
A&D , RF , celsius , 3D-IC , awr , Analysis , thermal , aerospace & defense , Custom IC , clarity

System, PCB, & Package Design 

IC Packagers: What Else Is There to Know About the New Release?

Last week we looked at new features largely targeting your manufacturing flow. Layer…

Tyler 17 Aug 2021 • 6 min read
17.4 QIR3 , IC Packaging and SiP , APD , IC Packagers , Allegro Package Designer , 17.4-2019

Computational Fluid Dynamics

This Week in CFD

A brief notice here that this Friday the 13th is also This Week in CFD day. Of note…

John Chawner 13 Aug 2021 • less than a min read
CFD , Automotive , Pointwise , fine/marine , jobs , Computational Fluid Dynamics , CFD Applications , Mesh Generation

System, PCB, & Package Design 

BoardSurfers: Reasons to Move to 17.4-2019 Hotfix019 of Allegro PCB Editor

Cadence OrCAD and Allegro 17.4-2019 Hotfix 019 was rolled out in mid-July and is…

Monika 13 Aug 2021 • 4 min read
PCB , Models , BoardSurfers , 3D Canvas , what's new , PCB Editor , Layout , 17.4-2019 , hotfix 019 , Allegro PCB Editor , microvia , 17.4-QIR3 , Allegro

System, PCB, & Package Design 

(P)SpiceItUp: Speed and Reliability Through Tried and Tested TI-PSpice Models

When time and quality are at a premium and you are in a hurry to meet a tight schedule…

mrigashira 13 Aug 2021 • 4 min read
17.4 , Models , OrCAD Capture , PSpiceA/D , (P)SpiceItUp , 17.4-2019 , hotfix 019 , library , Allegro

PCB設計/ICパッケージ設計

(P)SpiceItUp: PSpice Part Searchを用いて、カテゴリ、概要、または機能 (Category, Description, or Function…

設計者としては、回路設計の初期段階での要件はまったく異なります。つまり、回路デザインを実装するときに必要な部品情報と、テストや解析のためにシミュレーションするときに必要な部品情報は性質が異なるのです…

SPB Japan 12 Aug 2021 • less than a min read
OrCAD Capture , PSpiceA/D , (P)SpiceItUp , PSPICE , 17.4-2019 , OrCAD , japanese blog

PCB設計/ICパッケージ設計

(P)SpiceItUp: 5ステップによるシミュレーション プロファイル

回路が完成したら、いよいよシミュレーションを行います。最初のステップは、シミュレーション プロファイルの定義です。シミュレーション プロファイルは、どのような解析を実行するか…

SPB Japan 11 Aug 2021 • less than a min read
PSpiceA/D , PSPICE , 17.4-2019 , OrCAD , japanese blog

PCB設計/ICパッケージ設計

(P)SpiceItUp: 相対と絶対公差による精度と速度の管理におけるオプションのパワー

PSpice®には、Simulations SettingsダイアログボックスのOptionsタブに、強力でありながら見落とされがちな機能があります。このタブに用意されているデフォルト値は…

SPB Japan 11 Aug 2021 • less than a min read
OrCAD Capture , PSpiceA/D , logical design , (P)SpiceItUp , PSPICE , japanese blog , simulation
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