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Featured

Corporate News

Fortune & Great Place To Work Name Cadence to 2025 World’s Best Workplaces List

Great Place To Work® and Fortune magazine have honored Cadence as one of the Fortune…

Corporate
Corporate 13 Nov 2025 • 2 min read
news story , Culture , featured

Corporate News

Spectre FX Simulator Cuts Intrinsic Semi’s Memory Verification Time by 4X

Intrinsic Semiconductor Technologies, a company transforming the semiconductor industry…

Corporate
Corporate 11 Nov 2025 • 2 min read
newstory , featured , spectre fx , Instrinsic Semi , verification

Corporate News

Cadence Welcomes ChipStack

ChipStack, a leading startup providing agentic AI solutions for chip verification…

Corporate
Corporate 10 Nov 2025 • 1 min read
featured , agentic ai , Xcelium Logic Simulator , AI-Driven Verification

SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
Arif Khan 7 Nov 2025 • 3 min read
ucie , xcellium , IP , featured , PHY
cdns - all_blogs_categories

  • All 6139
  • Corporate News 210
  • Life at Cadence 201
  • Academic Network 167
  • Analog/Custom Design 775
  • Artificial Intelligence 24
  • Cloud 20
  • Computational Fluid Dynamics 363
  • Data Center 41
  • Digital Design 434
  • Learning and Support 56
  • RF Engineering 114
  • SoC and IP 419
  • System, PCB, & Package Design  992
  • Verification 1293
  • Cadence Japan 4

  • CFD(数値流体力学) 45
  • 中文技术专区 15
  • カスタムIC/ミックスシグナル 191
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
  • The India Circuit 90
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Verification

5G Network Revolution for Enhanced User Experience and Industry Digitalization

The emerging 5G network is the 5th generation of the cellular network. A 5G network…

Krunal Patel 10 Dec 2021 • 1 min read
eCPRI , Verification IP , Enhanced Common Public Radio Interface , 5G Network , Ethernet VIP , Functional Verification , Ethernet standards , Synchronous Ethernet , Funcional Verification , sync

CFD(数値流体力学)

Omnis 5.2 国内公式リリース

ケイデンスのCFD環境であるOmnisの最新版がリリースされました。プロジェクトやファイル管理の改良、ジオメトリ修正ツールの追加、マルチブロック構造格子、TurboおよびOpenソルバーの高速化など…

CFD Japan 9 Dec 2021 • less than a min read
CFD , Automotive , turbomachinery , webinars , Computational Fluid Dynamics , fluid dynamics , CFD Applications , simulation software , japanese blog , Mesh Generation , Omnis

The India Circuit

Mentor Story: Prashant Vardhan Agarwal - Cadence Scholarship Program

The Cadence Scholarship Program is the flagship CSR program of Cadence India, introduced…

Asim Khan 9 Dec 2021 • 3 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Computational Fluid Dynamics

Cadence is Funding Research on Adaptive Meshes for High-Speed Flows

This past summer, Cadence began funding research at the Massachusetts Institute of…

John Chawner 9 Dec 2021 • 2 min read

Breakfast Bytes

Always-On Devices

One problem with battery-powered devices is that we increasingly expect them to interact…

Paul McLellan 9 Dec 2021 • 5 min read
always on , vision p1 , Tensilica , aon

Digital Design

Voltus Voice: ESD Analysis Task Assistant: Your Key to 'Getting Started'

This blog discusses the implementation of task assistant for the Voltus ESD analysis…

Anshika Gahlaut 9 Dec 2021 • 4 min read
Silicon Signoff and Verification , Voltus IC Power Integrity Solution , ESD reports , Power Signoff , electrostatic discharge , current density , Power Integrity , ESD

Analog/Custom Design

Virtuosity: Tagging Variables and Corners in Virtuoso ADE Assembler

You can now assign tags to variables and corners in Virtuoso ADE Assembler. Check…

shubhangi upadhyay 9 Dec 2021 • 4 min read
Corner Tags , ADE , Virtuoso Analog Design Environment , Virtuoso , Variable Tags , Virtuosity , ICADVM20.1 , usability , Custom IC Design , Custom IC , IC6.1.8 , ADE Assembler

Computational Fluid Dynamics

Webinar: Simulation of Hydraulic Turbines with Omnis CFD Platform

Join CadenceTECHTALK on December 15! Improving the design of modern turbomachinery…

John Chawner 8 Dec 2021 • less than a min read
CFD , Open-PBS , turbomachinery , webinars , Computational Fluid Dynamics , Omnis

Computational Fluid Dynamics

More Control and Better Meshes in Pointwise Version 18.5

Automation in CFD mesh generation is of limited use if the resulting mesh isn’t suitable…

John Chawner 8 Dec 2021 • 2 min read
CFD , Pointwise , Computational Fluid Dynamics , Mesh Generation

Breakfast Bytes

The Cadence DAC Theatre...in Your Living Room

Historically at DAC, a large part of the booth was taken up by the Cadence Theatre…

Paul McLellan 8 Dec 2021 • 1 min read
DAC , videos , dac theatre

Life at Cadence

My Life at Cadence: Sebastien Caussette

At Cadence, our strength as a company comes from our innovative ideas, collaborative…

Lautanen 8 Dec 2021 • less than a min read
Insights on Culture , Culture , cadence , GPTW , my life at cadence , great place to work , life at cadence , cadence emea

The India Circuit

Join Cadence at DVCon India 2021 Next Week!

It's almost time for the event that Design and Verification engineers have been waiting…

Madhavi Rao 7 Dec 2021 • 1 min read
DVCon India , Accellera

System, PCB, & Package Design 

(P)SpiceITUp: Using Curve-Fitting to Optimize a Design

If you are interested in the performance of a circuit that can be best described…

mrigashira 7 Dec 2021 • 5 min read
17.4 , OrCAD Capture , PSpiceA/D , (P)SpiceItUp , 17.4-2019 , PCB design , PSpice Advanced Analysis

Breakfast Bytes

Cadence Endowments in Academia

Cadence has a long history of involvement with academia, going all the way back to…

Paul McLellan 7 Dec 2021 • 5 min read
MIT , Stanford , Berkeley , cmu , fellowships

PCB設計/ICパッケージ設計

ASCENT: 17.4-2019 Hotfix 019以上に移行すべき更なる理由とは

前回のブログ に続き、 Hotfix 019 で新たに追加された興味深い変更点を見てみましょう。Allegro® System Captureは、一人で作業する設計者でも…

SPB Japan 6 Dec 2021 • less than a min read
System Capture , Allegro Schematic , 17.4 , Allegro Pulse , Allegro System Capture , japanese blog , ASCENT , 17.4-QIR3 , Allegro

Verification

From AMBA ACE to CHI, Why Move for Coherency?

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from existing AXI protocol…

MinL 6 Dec 2021 • 2 min read
Verification IP , ACE VIP , Functional Verification , VIP , coherency , CHI VIP

Breakfast Bytes

Automotive Supply Chains

I'm sure you've heard that there are lots of supply chain issues. Container ships…

Paul McLellan 6 Dec 2021 • 6 min read
Automotive , semi , ic insights

Spotlight Taiwan

Cadence Sigrity X獲選亞洲金選獎(EE Awards Asia)年度EDA最佳產品獎

Cadence Sigrity X日前獲選為2021年亞洲金選獎(EE Awards Asia) EDA/IP組別台灣區與亞洲區年度最佳產品獎(Best Product…

candyyu 5 Dec 2021 • less than a min read
Sigrity X , system analysis , taiwanese blog

Spotlight Taiwan

超越摩爾定律 Cadence以Cerebrus與Integrity 3D-IC擘劃新局

Cadence『智慧系統設計』的策略方向下聚焦數位全流程的創新 – 今年推出驅動晶片設計及晶片尺寸未來的『Cerebrus智慧晶片設計工具』及『Integrity…

candyyu 5 Dec 2021 • less than a min read
cerebrus , Digital Implementation , taiwanese blog , intelligent system design , integrity3DIC
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