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Featured

Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
Cadence Japan 8 Jan 2026 • less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
Corporate 6 Jan 2026 • 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
Cadence Japan 22 Dec 2025 • less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
KomalJohar 17 Dec 2025 • 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

Corporate News

Socionext Is Tackling SoC Design Challenges

Socionext is an SoC company that has pioneered its business model to help companies…

Tanushri Shah 20 Jun 2024 • 1 min read
Tempus , designed with cadence , Socionext , digital , certus , Quantus

System, PCB, & Package Design 

Podcast: PCB 3.0: It’s All About the Data

Data management and PCB design discussions have shifted from the basics of data management…

NaomiM 19 Jun 2024 • less than a min read
data management , Allegro Pulse , PCB design , Workforce Development , Allegro

Corporate News

Cyber Security at the Olympics: Protecting the World's Greatest Games

The Olympic Games are more than just an international sporting event. They symbolize…

Corporate 19 Jun 2024 • 7 min read
security , cloud , cyber attacks , cyber security , Olympics , 2024 Paris Olympics , technology

System, PCB, & Package Design 

System Analysis Knowledge Bytes - Importance of VRM Modeling in PDN Simulation

This post talks about the role of VRMs in Power Integrity (PI) analysis It discusses…

Jasmine 18 Jun 2024 • 5 min read
Power Integrity Analysis , PDN , Cadence Online Support , Sigrity OptimizePI , signal integrity analysis , PDN Analysis , RAKs , Voltage Regulator Modules , VRMs

Corporate News

VIP Portfolio Expands for Data-Intensive Hyperscale Data Centers, HPC, and AI/ML

New additions, including first-to-market VIP for PCIe 7.0, Ethernet 1600G, GDDR7…

Corporate 18 Jun 2024 • 1 min read
ucie , Verification IP , featured , data center , VIP , PCIe 7.0 , PCIe , HPC , hyperscale , high-performance computing , AI/ML , GDDR7

Corporate News

Dream Chip and Cadence Demo Automotive SoC Featuring Tensilica AI IP at Embedded…

Cadence Verification and RTL-to-GDS Digital Full-Flow Tuned for Automotive Safety…

Corporate 18 Jun 2024 • 2 min read
Automotive , Verification IP , Tensilica , verification

System, PCB, & Package Design 

System Analysis Knowledge Bytes - Early System-Level Thermal Analysis

This post introduces you to the CAD capabilities of the Celsius Thermal Solver. It…

Jasmine 15 Jun 2024 • 3 min read
Celsius Thermal Solver , Cadence Online Support , RAK , Celsius 3D , Thermal Analysis

Corporate News

The History of Electronics in Sports

In today's fast-paced world, technology touches nearly every part of our lives, including…

Corporate 14 Jun 2024 • 5 min read
featured , PSPICE , design excellence , Tensilica , 49ers , McLaren Racing , olympic , Olympics , AI , technology

Learning and Support

CadenceLIVE Silicon Valley 2024

CadenceLIVE Silicon Valley 2024 was a notable event recently held at the Santa Clara…

ErinGrant 14 Jun 2024 • 2 min read
digital design , Semiconductor , bridgingthelearninggap , cadencelive , online training

SoC and IP

Cadence Showcases World's First 128GT/s PCIe 7.0 IP Over Optics

PCI-SIG DevCon 2024 was a great success for Cadence. We posted the blog, Cadence…

GautamS 14 Jun 2024 • 2 min read
Design IP , IP , featured , PHY , 128 GT/s , PCIe 7.0 , PCIe , Optics , SerDes , SerDes IP

カスタムIC/ミックスシグナル

Virtuoso Studio: 動作点パラメータ値を簡単にレビューする

当社の新しい AI 搭載カスタム設計ソリューション Virtuoso Studio は、我々の30年にわたる業界の知識とリーダーシップを活用し、革新的な機能、比類のない生産性を実現する再構築されたインフラストラクチャ…

Custom IC Japan 13 Jun 2024 • less than a min read
Operating point summary window , Virtuoso Studio , Operating Point Information , 動作点情報 , Virtuoso Analog Design Environment , カスタムIC設計 , japanese blog , Custom IC Design , Virtuoso ADE Explorer , Virtuoso ADE Assembler , ADE Assembler , IC23.1

Data Center

Reimagine Enterprise Data Center Design and Operations

Ever feel like the only constant in the data center industry is that things are always…

Danielle Gibson 13 Jun 2024 • 3 min read
featured , data center , digital twin

Cloud

Silvus Achieves Faster Tapeout of Advanced RF-MS Chip with Cadence Managed Cloud

Silvus Technologies announced the successful tapeout and bring-up of an advanced…

Mahesh Turaga 12 Jun 2024 • 1 min read
featured , Managed Cloud , EDA , cloud

SoC and IP

How Cadence Is Expanding Innovation for 3D-IC Design

The market is trending towards integrating and stacking multiple chiplets into a…

Vinod Khera 11 Jun 2024 • 5 min read

Corporate News

Cyborg Games at Olympics: Fusion of Technology and Physical Prowess

Envision a competition where athletes rely on their physical prowess and harness…

Corporate 11 Jun 2024 • 5 min read
Exoskeletons , Cyborg Games , Prosthetics , Olympics , 2024 Paris Olympics , technology

SoC and IP

Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24

PCI-SIG DevCon 2024 – 32 nd Anniversary For more than a decade, Cadence has been…

GautamS 11 Jun 2024 • 6 min read
Design IP , IP , PHY , PCIe 7.0 , PCIe , semiconductor IP , SerDes , PCI Express , PCI-SIG

Analog/Custom Design

Start Your Engines: Create and Insert Connect Modules for Mixed-Signal Verificat…

Read this blog to know how you can easily create and insert connect modules using…

Andre Baguenie 11 Jun 2024 • 8 min read
AMS , AMS Designer , Mixed-Signal , AMS simulation , mixed-signal design , AMS Verification , mixed-signal verification

Corporate News

NV5 Is Optimizing Data Center Efficiency, Performance, and Reliability

NV5 is a leading engineering firm at the forefront of designing AI compute data centers…

Tanushri Shah 10 Jun 2024 • 1 min read
CFD , NVIDIA , data center , designed with cadence , Computational Fluid Dynamics , AI , Cadence Reality DC

Corporate News

Electronics Everywhere and AI-Driven Design at IMS

Imagine a world where everything is electrified. From smart homes to wearable tech…

Corporate 10 Jun 2024 • 4 min read
IMS , featured
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