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Featured

Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
Cadence Japan 8 Jan 2026 • less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
Corporate 6 Jan 2026 • 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
Cadence Japan 22 Dec 2025 • less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
KomalJohar 17 Dec 2025 • 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

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Blog - Post List
Latest blogs

System, PCB, & Package Design 

BoardSurfers: Training Insights—New OrCAD X Presto Layout Design Application

The OrCAD X Presto next-generation layout design environment within the OrCAD X platform…

AsadMakandar 3 Nov 2023 • 2 min read
digital badge , Allegro X PCB Editor , BoardSurfers , 3dx , SPB23.1-2023 , PCB design and layout , Training Insights , OrCAD X Presto , OrCAD X , 23.1 , online training

Data Center

A Quick Start Guide: Building a Data Center Digital Twin

Even if you know a new software solution could help improve your workflow and data…

MarkSeymour 3 Nov 2023 • 3 min read
data center , digital twin

System, PCB, & Package Design 

Cadence OrCAD X and Allegro X 23.1 is Now Available

The OrCAD X and Allegro X 23.1 release is now available at Cadence Downloads . This…

AllegroReleaseTeam 2 Nov 2023 • 7 min read
TopXp , OrCAD X Capture CIS , Cadence Design Systems , padstack editor , Sigrity Aurora , featured , Allegro X PCB Editor , 3dx , PSpiceA/D , Allegro X Advanced Package Designer , APD , Cadence Doc Assistant , CDA , Topology Explorer , PCB design , OrCAD X Presto , OrCAD X , 23.1 , allegro x , Allegro X System Capture

SoC and IP

Cadence is a Contributing UCIe Consortium Member

This blog was originally posted on uciexpress.org . The Cadence member spotlight…

SFUNG 2 Nov 2023 • 5 min read
ucie , chiplets , Design IP and Verification IP

Computational Fluid Dynamics

Don’t Miss the Amazing Ride that is McLaren Racing Fandom!

Hey there racing enthusiasts! Today I want to take a moment to talk about a partnership…

Steve Brown 2 Nov 2023 • 4 min read
CFD , artificial intelligence , F1 , featured , Computational Fluid Dynamics , formula one , McLaren Racing , mclaren , formula 1 , AI

Computational Fluid Dynamics

Cadence CFD Technology Update – Turbomachinery Workflow

The Cadence Fidelity Flow for Turbomachinery is a unique toolset that encompasses…

Veena Parthan 2 Nov 2023 • 5 min read
CFD , turbomachinery , Cadence Fidelity Flow , simulation software , solvers , technology update , CadenceCONNECT CFD

Verification

USB4 Version 2.0 – Link Configurations

USB4 Version 2.0 specification was released by the USB Promoter Group earlier this…

Neelabh 1 Nov 2023 • 2 min read
USB4 VIP , USB4v2 , usb4 , USB4 Version 2 , usb4 router

Data Center

Validate Data Center Cooling Systems Externally Using CFD

It’s no secret that data centers are power hungry, so much so that data centers account…

MarkSeymour 1 Nov 2023 • 4 min read
CFD , data center , cooling

Verification

Accelerate Your Debug with Verisium - Cadence's Next-Generation Debug Solution

Debugging low-power designs is its own unique challenge in the verification field…

Tyler Sherer 31 Oct 2023 • 3 min read
Low Power , Functional Verification , Verisium Debug , VerisiumDebug

Verification

Be Optimistic About Xcelium's New X-Pessimism App!

In simulation, X-Propagation has been used to track how unknown states or signals…

Tyler Sherer 31 Oct 2023 • 2 min read
Functional Verification , x-pessimism , xcelium , simulation

Data Center

Validating Data Center Performance Using Cadence Reality DC Design

Data centers have become critical for efficiently processing massive data sets and…

Veena Parthan 31 Oct 2023 • 7 min read
6SigmaRoom , ASHRAE compliance , future facilities , data center , Computational Fluid Dynamics , tier ratings , simulation software

Artificial Intelligence (AI)

How Will EDA Benefit from the AI Revolution? - Part 2

I have always relished technology discussions and expert opinions on how technology…

Vinod Khera 30 Oct 2023 • 5 min read
Generative AI , AI in chip design , EDA , cadencelive , ai in eda

RF Engineering

Training Insights New Course: Planar EM Simulation in AWR Microwave Office

New online training course for AXIEM EM Simulator in AWR Microwave Office is available…

John Dunn 30 Oct 2023 • 1 min read
awr , EM simulation , AWR AXIEM , AWR Microwave Office , AXIEM 3D Planar Simulator , microwave office

System, PCB, & Package Design 

Sigrity and Systems Analysis 2023.1 HF2 Release Now Available

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2023.1 HF2 release is now available…

SigrityReleaseTeam 26 Oct 2023 • 4 min read
Sigrity and Systems Analysis , Celsius Thermal Solver , Clarity 3D Layout , Celsius EC Solver , PCB design , Celsius PowerDC , XtractIM , Clarity 3D Technology , Clarity 3D Workbench , PowerSI

Data Center

Reduce Data Center Over-Provisioning and Stranded Capacity for Sustainability

In the ever-evolving landscape of data centers, the issue of stranded capacity has…

Hassan Moezzi 26 Oct 2023 • 3 min read
featured , futurefacilities , data center , digital twin

Artificial Intelligence (AI)

How Will EDA Benefit from the AI Revolution?

With the rise in demands for instant gratification, high performance, and smart everything…

Vinod Khera 26 Oct 2023 • 7 min read
LLM , Artififical Intelligence , GenAI , ai in eda , AI/ML

Verification

Verifying Compliance During PCIe Re-Timer Testing Poses Challenges

Verifying compliance during PCIe re timer testing poses challenges. Cadence PCIe…

Kunal Chhabriya 25 Oct 2023 • 4 min read
Re-timer , System Design and Verification , VIP , PCIExpress , compliance , Polling Compliance

Artificial Intelligence (AI)

Designing AI/ML with Cadence Cerebrus

The Cadence Cerebrus Intelligent Chip Explorer has enabled a revolution in chip design…

Tanushri Shah 25 Oct 2023 • less than a min read
artificial intelligence , cerebrus , machine learning , AI/ML

Artificial Intelligence (AI)

AI for Circuit Design Quality, Productivity, and Advanced-Node Mapping

The future of circuit design, encompassing analog, RF/5G, and custom electronic circuits…

Steve Brown 25 Oct 2023 • 3 min read
featured , GenAI , Circuit Design , AI
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