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Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda

Corporate News

The New ASK Portal Brings a Smarter, Faster, and More Intuitive Experience

Finding the right support content should be simple, fast, and intuitive. The new…

Corporate
• 2 min read
featured , customer support , New ASK Portal , ASK Gen AI

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
• 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai
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SoC and IP

Apple controls 20% of NAND Flash market with iPhone and iPad says DRAMeXchange

With Apple fervor pheromones still heavy in the air from yesterday’s introduction…

• less than a min read

Verification

India Takes The Lead By Hosting The First Two “ClubTs” in 2010

Specman/ e users in India were very excited to see the first two ClubT events hosted…

• 4 min read
IntelliGen , Specman , Functional Verification , validation , e , team specman , ClubT , AOP , IES-XL

Verification

System Development – What To See At DAC 2010

The EDA360 vision paper specifies key System Realization challenges. Embedded software…

• 6 min read
DAC , cadence , ITRI , system realization , OSCI , Calypto , TSMC , Gary Smith , Imperas , SystemC , ARM , wind river , HLS , DAC 2010

SoC and IP

INDILINX reveals use of its Barefoot SSD controller in HLDS’ HyDrive optical/solid…

This blog has twice written up the newly announced HyDrive optical/solid-state hybrid…

• less than a min read

SoC and IP

Denali’s never-ending list of parties expands to Flash Memory Summit: August 18

Seems like the list of Denali parties for Summer 2010 never ends. Denali is heavily…

• less than a min read

SoC and IP

Verification tips and GLOBALFOUNDRIES low-power process to be discussed in Denali…

Going to DAC? Interested in making your verification processes more effective? Interested…

• less than a min read

SoC and IP

Last call for Denali’s DAC party: Anaheim, June 14

It’s the Denali DAC party for 2010. The big one. With the bells and whistles. With…

• less than a min read

Verification

Bloggers and Journalists and Gadflies, Oh My!

There has been quite a bit of discussion out in the blogosphere about the similarities…

• 3 min read
DAC , Functional Verification , EDA , Blogging , blogs

SoC and IP

An inconvenient truth about using DDR3 SDRAM for embedded designs

DDR (double data rate) memory chips mounted on DIMMs have long been the mainstay…

• 3 min read

Verification

EDA360 And The "Paperback Computer"

Have you ever heard an assertion that's so intriguing and farsighted that it sticks…

• 7 min read
events , DAC , IP , paperback computer , innovation , metric driven verification (MDV) , Functional Verification , Advanced Node , EDA360 , Verification IP modeling , EDAC

SoC and IP

Storage Analyst Jim Handy says “NAND Cache is Back!”

Storage analyst and Grand Poobah Jim Handy has just released a free White Paper titled…

• 2 min read

SoC and IP

Kingston shows HyperX USB 3.0 SSD prototype at Computex

Earlier, this blog reported on OCZ’s Enyo USB 3.0 SSD and now at a private event…

• 1 min read

Verification

Making an EDA360 System Realization Investment Through Standards Support

Cadence is a sponsor of the Open SystemC Initiative (OSCI) standards organization…

• less than a min read
TLM , C-to-Silcon , OSCI , ESL

SoC and IP

Introduced at Computex: OCZ’s speedy RevoDrive brings PCIe SSD to consumer-class…

PC add-on vendor OCZ plays in several high-performance PC component markets including…

• 1 min read

Verification

C-to-Silicon Compiler 10.1 - Ease Of Use And RTL QoR

In the continuing effort to make high-level synthesis more viable to mainstream RTL…

• 1 min read
CTOS , TLM , C-to-Silicon , Synthesis , HLS

SoC and IP

Hitachi’s Z HDDs: Will 2.5mm less height make a difference? For SSDs?

Hitachi just shaved 2.5mm off of the top of its 2.5-inch laptop hard drives, producing…

• 1 min read

SoC and IP

More details on and system-design implications of the Hitachi-LG Data Storage HyDrive…

As discussed last week in this blog, Hitachi-LG Data Storage (HLDS)--an OEM vendor…

• 3 min read

System, PCB, & Package Design 

What's Good About AMS Simulator And Cursors? You’ll Need The SPB16.3 Release To See

With the SPB16.3 release of AMS Simulator , several new cursor enhancements are available…

• 1 min read
AMS , AMS simulator , SPB 16.3 , PSPICE , SPB , AMS simulation , Schematic

SoC and IP

ST Microelectronics’ SPEAr1300 embedded MCU features 600MHz dual-core ARM Cortex…

A few days ago, this blog discussed the “big resistor” model of SDRAM power consumption…

• 2 min read
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