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Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent

Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 8 min read
chip , featured , AI infrastructure , agentic ai , packaging

Digital Design

Cadence RTL Design Studio: Built for the Full PPAC Journey

If you've used Joules RTL Design Studio, you already know what it can do. Now it…

raquelp
• 2 min read
Digital Design and Signoff , featured , Joules , Digital Implementation , rtlstudio

Corporate News

How the New ASK AI Assistant Makes Support More Seamless

Finding the right answer often takes more than one question. Users may start with…

Corporate
• 2 min read
featured , customer support , Generative AI , ASK Portal , ASK AI Assitant
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Blog - Post List
Latest blogs

SoC and IP

Boosting AI Performance with CXL

AI workloads are outpacing traditional memory architectures—but CXL®︎ offers a smarter…

• 3 min read
CXL , Design IP , IP , controller , PCIe

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

• 3 min read
ucie , Design IP , featured , TSMC , die-to-die , HPC , AI

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC , AI

Analog/Custom Design

Virtuoso Studio: Faster, Smarter Object Creation with Quick Dimension Editing

This blog introduces QDE, a feature that streamlines object creation. Instead of…

• 3 min read
Virtuoso Studio , Quick Dimension Edit , Virtuoso , Custom IC Design , QDE , Virtuoso Layout Suite , Custom IC , Virtuoso Layout Suite XL

System, PCB, & Package Design 

ALS Uses Cadence Sigrity X to Accelerate High-Speed PCB Design

A new Cadence success story details how Advanced Layout Solutions (ALS), a UK-based…

• 2 min read
PCB , Power Integrity , Signal Integrity , PCB design , Sigrity

Life at Cadence

A Day in the Life: HR Intern Edition

Written by Alisha Jain Every day as a Cadence intern brings something new – whether…

• less than a min read
Culture , featured , LifeAtCadence , great place to work , internship

Physical Systems Simulation (CAE)

How Multiphysics Is Transforming Product Design

This page was originally published as a part of Hexagon's Design and Engineering…

• 3 min read
physical systems simulation , computer-aided engineering , CAE Software , multiphysics

Corporate News

Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

• 6 min read
Automotive , featured , physical ai , automotive electronics , AI

SoC and IP

Cadence Powers AI Infra Summit '25: Memory, Interconnect, and Interface Focus

AI is driving a new semiconductor renaissance—it's no longer just a workload, but…

• 2 min read
controller IP , ucie , Design IP , IP , Memory , AISummit , 224G-LR , HBM , hbm4 , memory IP , Ethernet , AI training , Ethernet PHYs , UALink , AI , data centers , AIInfraSummit

Digital Design

RTL-to-GDSII Back-End Flow: Navigating from Synthesis to Timing Signoff

Are you interested in learning the key steps to designing a physical layout from…

• 3 min read
Synthesis to Timing Signoff , Physical verification , conformal , DFT , design rule violations , online courses , Innovus Implementation System , Routing , LEC , STA , Setup and Hold Analysis , Cadence Online Support , Floorplanning , RTL-to-GDSII , training , webinar , place and route , Cadence training , RTL-to-GDSII BackEnd , Digital Implementation , Cadence Modus DFT , Timing analysis , Genus Synthesis Solution , Synthesis , signoff , silicon signoff , Tempus Timing Signoff Solution , online training , physical implementation , Cadence RTL2GDSII Flow , Modus ATPG , cadence learning and support

Corporate News

The Birth of the Integrated Circuit

On September 12, 1958, in a modest lab in Dallas, Texas, the seeds of a digital revolution…

• 3 min read
IC , chip , chip design automation , IC design

System, PCB, & Package Design 

Alphawave Designs High-Quality, Complex Chips Quickly with Clarity 3D Solver

Alphawave Semi is a global leader in high-speed connectivity and compute silicon…

• 1 min read
Signal Integrity , SerDes , PCB design , Clarity 3D Solver

Analog/Custom Design

Virtuoso Studio: Schematic Syntax for Hierarchical Nodes and Buses in DeepProbe

In the ever-evolving world of analog design, efficiency and clarity are key. With…

• 3 min read
Virtuoso Schematic Editor , Virtuoso Studio , Virtuoso , Schematic Editor , Custom IC

Physical Systems Simulation (CAE)

Designing Passengers’ In-Flight Experience

This page was originally published as a part of Hexagon's Design and Engineering…

• 2 min read
CFD , physical systems simulation , computer-aided engineering , simulation software , CAE Software

Corporate News

VoxelSensors: Enhancing AI Agents Through Unique Perception Systems with Cadence

AI agents are rapidly heading towards offering us personal assistance in our daily…

• 2 min read
designed with cadence

Physical Systems Simulation (CAE)

Real-Time Design and Feedback of 3D-Printed Orthopaedic Insoles

This page was originally published as a part of Hexagon's Design and Engineering…

• 2 min read
physical systems simulation , computer-aided engineering , digital twin , simulation software , CAE Software

SoC and IP

Design for Reliability: Midas Safety Platform

In today’s safety-critical applications—automotive, aerospace, industrial automation…

• 3 min read
Automotive , semiconductor IP , Internet of Things

Digital Design

Transforming Equivalence Checking with Conformal AI Studio

From Manual Debugging to AI-Powered Verification Imagine you're a verification engineer…

• 1 min read
conformal , Digital Implementation

Digital Design

From Concept to Cool: Optimizing Low-Power Design with Genus Synthesis Solution

Join Cadence Training and Education Application Engineer Architect, Neha Joshi ,…

• 2 min read
webinar , Genus Synthesis Solution , online training
CDNS - Fix Layout Hompage