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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

Breakfast Bytes

CDNLive India

CDNLive India took place last week. As usual, I made the long trip from California…

• 5 min read

System, PCB, & Package Design 

New Sigrity 3D Workbench Used in Designing and Optimizing Next Generation High-Speed…

2018 is going to be remembered as the year of 3D for Sigrity. As part of Cadence…

• 2 min read
Sigrity 2018 release , 3D Workbench , Mechanical Structures , CDNLive , High Speed Structure Optimization , PowerSI 3D EM Extraction Option , 3DEM , 3D , Sigrity , High Speed design

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之4：行业领先的背钻能力

背钻的发展历程 15年来，在很多电子设计中处理5Gbps或更高频率的高速接口布线已越来越常见。在信号过孔上存在Stub的情况下，高速信号换层将会对信号完整性产生巨大影响…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , 背钻 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , Allegro

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之3：新的PAD编辑器——不只是一个新GUI

客户反馈是产品改善的关键 当您在理解Allegro 17.2-2016发行版的特点和优势时，我可以猜到您在想什么。“哦不，他们对我的工作环境做了什么破坏？”如果您已使用Allegro多年了…

• less than a min read
Chinese blog , Allegro 17.2 , 钻孔 , 掩模 , 禁止区 , PCB设计 , 中文 , 焊盘 , Allegro升级17.2 , Allegro

RF Engineering

Measurement of Phase Noise in Oscillators

The other day, I happened to sneak out some time for myself after having sent the…

• 1 min read
HBnoise , HB , Spectre RF , pnoise , phase noise , harmonic balance , pss , Oscillator

Analog/Custom Design

Virtuoso: The Next Overture – Introducing Design Planner

Watch out for our new layout design capability that allows you to plan more efficiently…

• 2 min read
Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Advanced Release , Virtuoso , New in EDA , Custom IC Design , Design Planner , Custom IC , Layout Editing

Breakfast Bytes

PCAST: The President's Council of Advisors on Science and Technology

In January 2017, a report Ensuring Long-Term U.S.Leadership in Semiconductors was…

• 6 min read
electronics resurgence initiative , Hennessy , magestic , pcast , eri , darpa

Breakfast Bytes

What's For Breakfast? Video Preview September 10th to 14th 2018

https://youtu.be/iv9wdAVB6vg Coming from CDNLive India (camera Seena Shankar) Monday…

• less than a min read
meltdown , CDNLive India , CDNLive , Spectre , hot chips

Breakfast Bytes

Numbers Everyone Should Know

At the recent HOT CHIPS, Paul Turner of Google Project Zero talked about numbers…

• 5 min read
cpu speed , cache , networking

Breakfast Bytes

GLOBALFOUNDRIES Drops 7nm to Focus on Other Geometries

GF put out a press release last week with the title GF Reshapes Technology Portfolio…

• 4 min read
Intel , AMD , Samsung , TSMC , 5nm , GlobalFoundries , 7nm , EUV

Academic Network

APAC IC Design Contests

China Graduate IC Design Contest Contest Duration: April – August 2018 This is Cadence…

• 1 min read
apac , Cadence Academic Network

Whiteboard Wednesdays

Whiteboard Wednesdays - What You need to Know About ISO26262-2018 2nd Edition

In this week's Whiteboard Wednesdays video, the first in a multi-part series, Scott…

• less than a min read
Whiteboard Wednesdays , ISO 26262

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之2：新的实时并行团队设计功能

利用团队设计实现快速设计 无论如何，PCB团队设计总是实现快速设计的最佳捷径。您可以使用Allegro 17.2 2016版本中新的实时并行团队设计功能，通过动态分配资源来应对设计周期不断缩短的挑战…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , Symphony , PCB设计 , 中文 , 实时设计 , Allegro升级17.2

Breakfast Bytes

Ambit Design Systems

Twenty years ago today, Cadence announced it was acquiring Ambit Design Systems.…

• 5 min read
ambit , Synthesis , buildgates

Breakfast Bytes

Labor Day Off-Topic: Almost Everyone Has More Than the Average Number of Legs

It's Labor Day. Cadence is closed in the US. Unfortunately, I'm in India and it's…

• 5 min read
math , off-topic , mathematics

Analog/Custom Design

Virtuosity: Opening Old ADE States and Views with ADE Explorer and ADE Assembler

Have you found it a pain that when opening a Virtuoso ADE L state or a Virtuoso ADE…

• 2 min read
Explorer , ADE Migration , ADE , Virtuoso Analog Design Environment , Analog Design Environment , Virtuosity , IC6.1.7 , Custom IC Design , Assembler

Analog/Custom Design

Virtuoso IC6.1.7 ISR22 and ICADV12.3 ISR22 Now Available

The IC6.1.7 ISR22 and ICADV12.3 ISR22 production releases are now available for download…

• 2 min read
Analog Design Environment , ICADV12.3 , ADE Explorer , ADE , Layout , Virtuoso , IC6.1.7 , Custom IC Design , Custom IC

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之1：先进的柔性和刚柔结合板设计支持

为何要刚柔结合？ 对几乎所有应用，客户一直希望能有更小、更轻、性价比更高的产品。竞争压力也促使设计工程师们以不断增长的速度将这些新产品带到市场。设计工程师们可使用柔性PCB材料…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , PCB设计 , 中文 , MCAD-ECAD , IPC-2581 , Allegro PCB编辑器 , 刚柔结合设计 , Allegro升级17.2 , 刚柔结合

Breakfast Bytes

HOT CHIPS Tutorial: On-Device Inference

The Sunday of the annual HOT CHIPS (the 30th!) conference is tutorial day. In the…

• 5 min read
deep learning , inference , Tensilica , hot chips , inferene , neural networks
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