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Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Corporate News

Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology

Delivering the next wave of chiplet innovation, Cadence has successfully taped out…

Corporate
• 2 min read
news story , ucie , featured , chiplets , TSMC N3P

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured
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Blog - Post List
Latest blogs

Academic Network

From China through Cadence to IMEC

Zhan Gao studied microelectronics in the Xidian University in China and after getting…

• 1 min read
Cadence interns , Interns , Cadence Academic Network , imec , ATPG

Breakfast Bytes

CASPA's Autonomous Driving Symposium

Recently, CASPA, the Chinese-American Semiconductor Professionals Association, held…

• 6 min read
lidar , chinese semiconductor professionals association , caspa , ADAS , autonomous vehicles , Breakfast Bytes

Digital Design

Have DRC Tools Run Out of Steam? – Part 2

We are continuing the physical verification blog posts with more questions we hear…

• 3 min read
massively scalable , DRC , multithread , distributed processing

Breakfast Bytes

ESD Alliance CEO Panel: April 6th

In the days when the ESD Alliance was still called EDAC, they used to organize a…

• 4 min read
cadence , ceo forum , EDA , ARM , synopsys , Breakfast Bytes , esd alliance , Mentor

Analog/Custom Design

Virtuoso Video Diary: Controlling the Information Displayed on Outputs Setup and…

In Virtuoso ADE Explorer and Virtuoso ADE Assembler , it’s not unusual to see a large…

• 3 min read
Analog Design Environment , ADE Explorer , Virtuoso ADE , Virtuoso Analog Design Environment , Virtuoso , Virtuoso Video Diary , Custom IC Design , ADE Assembler

Breakfast Bytes

My Breakfast with Lucio

There is a famous 1981 movie called My Dinner with Andre. If you've not seen it,…

• 5 min read
open source ip , IoT , lanza techventures , Lucio Lanza , Internet of Things , Breakfast Bytes , efabless

Whiteboard Wednesdays

Whiteboard Wednesdays - Convolutional Neural Network (CNN) Architecture

In this week's Whiteboard Wednesdays video, the second in a two-part series, Megha…

• less than a min read
object detection , deep learning , convolutional neural networks , CNN

Breakfast Bytes

How Lucio Went from Italy to EDA via Intel

Tomorrow, I'll be talking about one of Lucio Lanza's latest areas of interest, having…

• 5 min read
Intel , olivetti , lanza techventures , Lucio Lanza , Daisy , Phil Kaufman , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview April 3rd to 7th 2017

https://youtu.be/juyMucCfa-I Coming from the Cadence parking lot Monday…

• less than a min read
security , Automotive , autonomous driving , linley group , mgm resorts , linley autonomous , ADAS , gomac

Breakfast Bytes

The SDE Circle of Life Today

This is the second part of a two-part post about the SDE Circle of Life. The first…

• 5 min read
Automotive , SDE , mobile , system design enablement , iPhone

Breakfast Bytes

The SDE Circle of Life

There seems to be a big picture phenomenon that I like to call the System Design…

• 5 min read
Automotive , SDE , mobile , system design enablement

Verification

A Seamless Path to the Portable Stimulus Standard

In our last blog post , we reviewed some of the activities at the recent Design and…

• 3 min read
uvm , prototyping , pswg , Acceleration , Functional Verification , Perspec , System Design and Verification , Palladium , SoC , Emulation , Simulation acceleration , DVcon , Accellera , metric-driven verification , Hardware/software co-verification , portable stimulus , simulation , verification

Breakfast Bytes

Léman Micro Devices: Blood Pressure on Your Smartphone

One of the most interesting things I saw at MWC was a meeting I had with Mark-Eric…

• 6 min read
Léman Micro Devices , medical electronics , mobile , cadence hosted design environment , blood pressure , Smartphone

Breakfast Bytes

TSMC Technology Symposium 28...22...16...12...7...

This is the second of two posts about last week's TSMC Technology Symposium. The…

• 7 min read
OIP , n5 , 12FFC , TSMC , TSMC Technology Symposium , n7+ , n7

Whiteboard Wednesdays

Whiteboard Wednesdays - Introduction to Convolutional Neural Networks (CNN)

In this week's Whiteboard Wednesdays video, the first in a two-part series, Megha…

• less than a min read
Automotive , deep learning , vision , convolutional neural networks , mobile , ADAS , CNN

Breakfast Bytes

What's For Breakfast? Video Preview March 27th to 31st 2017

https://youtu.be/-_33atq9vRY Coming from National Automobile Museum, Reno,…

• less than a min read
ESDA , circle of life , lanza techventures , Lucio Lanza , system design enablement , SDA , esd alliance , virtual dummy metal fill

Breakfast Bytes

TSMC Technology Roadmaps

TSMC had their annual Technology Symposium last week. As always, my post comes with…

• 6 min read
Automotive , n5 , IoT , TSMC , HPC , n7 , mobile , n10

Academic Network

The Worldwide MEMS Design Contest Officially Starts

Cadence, X-FAB, Coventor and Reutlingen University have Selected 10 Design Teams…

• 2 min read
Cadence Academic Network , X-FAB , MEMS Design Contest , Reutlingen University , CDNLive EMEA , Mixed-Signal , Coventor

Breakfast Bytes

CDNLive Silicon Valley Preview

Yes, it's that time of year again. Just like a cat has nine lives, Cadence has nine…

• 2 min read
microsoft , CDNLive , Santa Clara Convention Center , CDNLive Silicon Valley
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