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Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
• 3 min read
ucie , Design IP , featured , TSMC , die-to-die
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Computational Fluid Dynamics

Women in CFD with Shi Yee Lim

The Women in CFD series highlights the career expedition of women in computational…

• 5 min read
CFD , product engineer , fluid dynamics , WomenAtCadence , Fidelity CFD , women in engineering , engineering , simulation software , NUMECA , Women in CFD

Cloud

For Advanced Chip Design, It’s Time To Go Cloud-First

EDA in the cloud is on the cusp of mass adoption. Semiconductor companies big and…

• 6 min read
SaaS , featured , cloud

Breakfast Bytes

Jasper User Group 2022: Ziyad's SOTU

This year's Jasper User Group meeting took place last week. As usual, the meeting…

• 3 min read
Jasper User Group , featured , JUG , formal , jjasper , Formal verification

Verification

DisplayPort (DP) Tunneling over USB4

USB4 is an industry standard that tunnels three different protocol specifications…

• 2 min read
Verification IP , USB4 VIP , USB4v2 , USB4 DP Tunneling , DP Tunneling , usb4

Computational Fluid Dynamics

Last Week at Fidelity CFD

Good morning and welcome to the last full week of October. Before we plunge into…

• 4 min read
Marine Engineering , automotive engineering , FINE Marine , turbulence , geometry cleanup , overset meshing , RANS , solar vehicles , Pointwise , cadencelive , scale-resolving simulation , Mesh Generation

Breakfast Bytes

IEDM and RISC-V Summit 2022 Previews

There are two big events coming up in the first couple of weeks of December. IEDM…

• 5 min read
risc-v , risc-v summit , IEDM

Verification

Demystifying PCIe Lane Margining Technology

Lane Margining which was introduced in PCIe 4.0 and has been a very important technology…

• 3 min read
Verification IP | Functional Verification | VIP | System Verification | simulation | verification

Breakfast Bytes

Cadence, McLaren, and the United States (Austin) Grand Prix

As you probably know, Cadence has a technology partnership with McLaren racing. I…

• 5 min read
CFD , F1 , mclaren , formula 1

Life at Cadence

Building Confidence through the Cadence Returnship Program

Re-entering the high-tech field after taking a break to prioritize family can be…

• 1 min read
Cadence Culture , returnship

System, PCB, & Package Design 

Cadence OrCAD and Allegro 22.1 is Now Available

The OrCAD® and Allegro® 22.1 release is now available at Cadence Downloads . This…

• 6 min read
TopXp , Cadence Design Systems , Sigrity Aurora , PSpiceA/D , 22.1 , PSPICE , Topology Explorer , PCB design , Allegro System Capture , Allegro PCB Editor , Pulse , Allegro

Life at Cadence

IQM Is Building the Next Generation of Quantum Computers

IQM seeks to solve one of the greatest technological challenges globally: building…

• 1 min read
RF , awr , designed with cadence

Life at Cadence

RISC-V Is Thriving – Here’s What You Need to Know

RISC-V, the open-standard Instruction Set Architecture (ISA) conceived by UC Berkeley…

• 4 min read
risc-v

Breakfast Bytes

Latinx Heritage Month

Last week, Cadence held a Mercado Fiesta on the campus to celebrate Latinx Heritage…

• 2 min read
latinx , latinx heritage month , Hispanic

Analog/Custom Design

Start Your Engines: Clone your AMS Designer Testcases and Rerun them Anywhere

Design Capture and Packaging (DCP) utility lets you isolate, capture and package…

• 5 min read
mixed signal design , AMS Designer , AMSD , Start Your Engines , Mixed-Signal , Design Capture , Cadence Community

Digital Design

HLS for AI/ML Models: TensorFlow to RTL

Artificial Intelligence (AI) plays a key role in semiconductors to meet the challenging…

• 3 min read
Stratus HLS , Genus

Computational Fluid Dynamics

Augment Certainty of Bio-simulation Studies with Computational Fluid Dynamics

Computational fluid dynamic (CFD) simulations have a lot to offer for a top-level…

• 4 min read
openeye scientific , molecular sciences , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , Cadence CFD , drug delivery mechanism

カスタムIC／ミックスシグナル

Spectre Tech Tips: ダイナミック電流密度チェック

デバイスと回路の信頼性は、個々のMOSFET デバイスが短時間に消費する電力と、発生する熱の量に大きく依存しています。信頼性と寿命を向上するために、回路設計者はデザイン内のデバイスの消費電力を最適化する必要があります…

• 1 min read
spectre aps , Spectre 21.1 , Dynamic Checks , Dynamic design checks , Spectre Circuit Simulator , Spectre , japanese blog , spectre x

Verification

USB4 Version 2.0 – Next frontier in High-Speed Data Tunneling

USB4 Version 2.0 specification was recently released by the USB Promoter Group. This…

• 2 min read
USB4 VIP , USB4v2 , usb4 , USB4 Version 2

Computational Fluid Dynamics

Last Week at Fidelity CFD

It's Monday and time to look back on what happened last week here at Cadence Fidelity…

• 3 min read
CFD , turbomachinery , webinars , Pointwise , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , Mesh Generation
CDNS - Fix Layout Hompage