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Next Steps for the Cadence and SkyWater MPW Service

At Cadence, we are dedicated to nurturing future innovators. Our commitment to education…

Corporate
• 6 min read
news story , featured , Cadence Academic Network , SKY130

Corporate News

New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug

Verification engineers continually report that up to 70% of the total engineering…

Corporate
• 2 min read
news story , featured , verisium , AI

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Breakfast Bytes

DesignCon 2022: The 224G Show

At DesignCon, there is often a theme that comes through, and this year there were…

• 4 min read
224G , pam4 , extended long reach , pam6 , 112g , long reach , SerDes

Analog/Custom Design

Virtuosity: Custom IC Design Flow/Methodology – Schematic Capture and Circuit Si…

Read this blog for an introduction to the Custom IC Design methodology and the key…

• 5 min read
Virtuoso Schematic Editor , Analog Design Environment , custom/analog , ADE Explorer , Explorer , Analog Simulation , analog , Virtuoso Visualization and Analysis XL , ADE , Virtuoso Analog Design Environment , Spectre , Schematic Editor , ViVA , Virtuosity , ICADVM20.1 , AMS simulation , mixed signal , analog design , usability , Custom IC Design , Custom IC , IC6.1.8 , Assembler , Schematic , custom design technology , ADE Assembler

Computational Fluid Dynamics

Meet Our Marine CFD Experts at the Euromaritime Exhibition

On June 28-30 2022, the Maritime Community meets again in Marseille at this biennial…

• 1 min read
CFD , naval archicture , Marine Engineering , marine , fine/marine , Computational Fluid Dynamics , fluid dynamics , CFD Applications , naval

Breakfast Bytes

Secure Before You Fabricate

One thing that I have come into contact with recently is the notion that the US defense…

• 5 min read
security , Mil-Aero , prototyping , Protium , Palladium , Emulation

Verification

Device Training for High Speed DRAMs

As the device frequencies and the data rates go up with every new generation of Interface…

• 3 min read
Verification IP , ddr5 , VIP , JEDEC , Training Modes , lpddr5 , lpddr5x , memory models , DDR5DIMM

Breakfast Bytes

The Convergence of Photonic and Electronic ICs

At the recent DesignCon in Santa Clara, one of the keynotes was by John Bowers of…

• 4 min read
DesignCon , silicon photonics , photonics

Spotlight Taiwan

Cadence Perspec驗證在異質多核心行動處理器之應用

作者:Vic Chen, Principal Application Engineer, Cadence可攜式測試與刺激標準(Portable Test and…

• 1 min read
PSS Methodology , Perspec , cadencelive taiwan , perspec system verifier , taiwanese blog

Breakfast Bytes

Sunday Brunch Video for 10th April 2022

https://youtu.be/fmV1XVY-ZiI Made at Coyote Hills Regional Park (camera Carey) Monday…

• less than a min read
sunday brunch

System, PCB, & Package Design 

BoardSurfers: Reasons to Move to 17.4-2019 HotFix SPB17.40.028 of Allegro PCB Ed…

The HotFix SPB17.40.028 of 17.4-2019 of Allegro® PCB Editor has been rolled out and…

• 3 min read
17.4 , BoardSurfers , padstack , DesignTrue DFM , QIR4 , 17.4-2019 , Constraints , Allegro PCB Editor , Allegro

Breakfast Bytes

Ericsson Cellular Network at TÜV Rheinland Test Center

At the end of March, I went to the TÜV Rheinland Test Center. TÜV stands for Technischer…

• 4 min read
Automotive , Ericsson , tüv , mobile

Breakfast Bytes

Identity Is the New Perimeter

On March 10th, Black Hat organized a webinar called Identity is the New Perimeter…

• 9 min read
security , black hat , orange

Analog/Custom Design

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 13: Analog Fault S…

While the analog and mixed-signal components are the leading source of test escapes…

• 4 min read
Automotive , legato , ICADVM20 , functional safety , analog fault simulation , analog , training bytes , Virtuoso , Analog IC Design videos , Spectre , 1 , Virtuoso Video Diary , aging , Custom IC Design , IC6.1.8 , reliability , Legato Reliability , ADE Assembler

PCB設計／ICパッケージ設計

2022年3月リリース、Cadence OrCAD / Allegro17.4-2019 HotFix SPB17.40.028の新機能ハイライト

OrCAD® および Allegro®のHotFix 028 (QIR 4, アプリケーションのスプラッシュ画面で は “2022” と表示されます) の更新プログラムが…

• less than a min read
17.4 , PCB Editor , 17.4-2019 , OrCAD , Allegro System Capture , japanese blog , Allegro PCB Editor , Pulse , Allegro

Breakfast Bytes

Sam Zeloof: Who Needs a Cleanroom When You Have a Garage?

At the end of last year, I was mindlessly looking at YouTube when their "algorithm…

• 3 min read
sam zeloof , garage

Computational Fluid Dynamics

Replicating da Vinci’s Aerial Vehicle Design

The increasing value of the drone industry is pushing the limits of evaluating and…

• 3 min read
vehicle design , Unmanned Aerial Vehicles , UAV , da Vinci , CFD Applications , engineering , extreme maneuvers , drones , simulation , Aerodynamics

Computational Fluid Dynamics

Rank-N Nonlinear Harmonic Method Unlocks More Precise And Reliable Turbomachinery…

The NLH Rank-n feature unlocks the possibility of simulating unsteady phenomena across…

• 1 min read
CFD , turbomachinery , webinars , Computational Fluid Dynamics , fluid dynamics , nonlinear harmonic , CFD Applications , simulation software , rank-n , nlh , Turbo , simulation

Breakfast Bytes

Jack Dongarra Receives Turing Award

Last week, the ACM announced that Jack Dongarra was being honored with the 2021 Turing…

• 4 min read
turing award , supercomputer

SoC and IP

TWS Earbud Design: Scaling up

We now look to scale the architecture from Good-enough earbuds, to Better (mid-tier…

• 9 min read
Tensilica DSPs , Tensilica

SoC and IP

TWS Earbud Design Is About Scaling

It is important that OEMs and SoC providers of TWS earbuds prepare to offer the quality…

• 5 min read
featured , Tensilica
CDNS - Fix Layout Hompage